Vendor: Cadence Design Systems, Inc. Category: CoaXPress

Simulation VIP for CoaXPress

In production since 2018.

Verification IP View all specifications

Overview

In production since 2018.

This Cadence® Verification IP (VIP) supports the CoaXPress standard. It provides a mature, highly capable compliance verification solution that supports simulation, formal analysis, and hardware acceleration platforms, making it applicable to intellectual property (IP), system-on-chip (SoC), and system-level verification. The VIP for CoaXPress is compatible with the industry-standard Universal Verification Methodology (UVM), runs on all leading simulators, and leverages the industry-standard Cadence Memory Model core architecture, interface, and use model.

Supported specification: The VIP for CoaXPress supports the specification versions: 1.0, 1.1, and 1.1.1.

Key features

  • Configurations
    • Supports up to 16 connections, up to 16 devices
  • Bit Rates
    • 1.25Gbps, 2.5Gbps, 3.125Gbps, 5Gbps and 6.25Gbps
  • Encode
    • Supports 8B/10B encoding and decoding for up connections and down connections
  • Device Discovery
    • Supports Device Discovery process
  • Pixel Formats
    • Mono, Bayer (all sub types), RGB, RGBA, YUV (all sub types), YcbCr601 (all sub types) and YcbCr709 (all sub types)
  • Control Data
    • Control commands: memory read, memory write, control channel reset
    • Control ack: final, wait, logical errors, and others
    • Max Control Size
  • Stream Data
    • Supports stream data packing, Stream markers, Link framing, Single stream, Multi-streams up to 256 streams and Max data size
  • Bootstrap Registers
    • Supports Bootstrap registers
  • Triger
    • Supports Trigger and I/O - Trigger acknowledgment 
  • IDLE
    • Supports IDLE packet
  • CRC
    • Supports CRC for Steam and Control Data
  • Transmission Order
    • Supports packet transmission priority 0,1, and 2
  • Scan Modes
    • Supports Rectangular Image Stream

Block Diagram

Simulation VIP for CoaXPress block diagram

Specifications

Identity

Part Number
Simulation VIP for CoaXPress
Vendor
Cadence Design Systems, Inc.
Type
Verification IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Learn more about CoaXPress IP core

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Frequently asked questions about CoaXPress IP cores

What is Simulation VIP for CoaXPress?

Simulation VIP for CoaXPress is a CoaXPress IP core from Cadence Design Systems, Inc. listed on Semi IP Hub.

How should engineers evaluate this CoaXPress?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this CoaXPress IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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