CoaXPress (CXP) Verification IP
CXP Verification IP implements digital interface for high speed image data transmission and intended mainly for Machine Vision ap…
Overview
CXP Verification IP implements digital interface for high speed image data transmission and intended mainly for Machine Vision applications. The interface is also suitable for other imaging applications and for high speed data transmission in other fields. CXP Verification IP provides an smart way to verify the CXP standard video data transmission and control interfaces between Host and Device. The SmartDV's CXP Verification IP is fully compliant with CXP specification and provides the following features.
CoaXPress (CXP) Verification IP is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env
CoaXPress (CXP) Verification IP comes with optional Smart Visual Protocol Debugger (Smart ViPDebug), which is GUI based debugger to speed up debugging.
Key features
- Full CXP Device and Host functionality.
- Supports following Channels,
- Stream Channel
- I/O Channel
- Control Channel
- Supports 8,10,12,14,16 bit depth.
- Supports following bit rates for high speed downconnection.
- 1.25 Gbps
- 2.50 Gbps
- 3.125 Gbps
- 5.00 Gbps
- 6.25 Gbps
- 10 Gbps
- 12.5 Gbps
- Supports following bit rates for low speed up connection.
- 20.83 Mbps
- 41.66 Mbps
- Supports 8B/10B Encoding.
- Supports packing of all the video formats supported by the CXP v2.0 specification.
- Supports the following color format.
- Raw
- Mono
- Planar_1 to Planar_15
- BayerGR
- BayerRG
- BayerGB
- BayerBG
- RGB
- RGBA
- YUV_411, YUV_422, YUV_444
- YCbCr_601_411,YCbCr_601_422, YCbCr_601_444
- YCbCr_709_411, YCbCr_709_422, YCbCr_709_444
- Supports Bootstrap register set as per CXP v2.0 specification.
- Supports packet multiplexing from different streams.
- Supports connection test facilities to test the quality of the connection.
- Supports Unified Time Stamping as per CXP version 2.0 specification.
- Supports Link Sharing as per CXP version 2.0 specification.
- Supports backward compatibility for version 1.1.1 specification.
- High speed up connection with maximum bit rate of 6.25 Gbps
- Low speed up connection with 20.83 Mbps bit rate
- HsUpConnection bootstrap register is used to indicate the HS up connection support.
- Monitors, detects and notifies the test bench of significant events such as transactions, warnings, timing and protocol violations.
- Status counters for various events on bus.
- Callbacks in node transmitter, receiver and monitor for user processing of data.
- CXP Verification IP comes with complete test suite to test every feature of CXP v1.1.1 specification.
- Functional coverage for complete CXP features.
Block Diagram
Benefits
- Faster testbench development and more complete verification of CXP designs.
- Easy to use command interface simplifies testbench control and configuration of Transmitter,Receiver and Monitor
- Simplifies results analysis.
- Runs in every major simulation environment.
What’s Included?
- Complete regression suite containing all the CXP testcases.
- Examples showing how to connect various components, and usage of Transmitter,Receiver and Monitor.
- Detailed documentation of all class, task and function's used in verification env.
- Documentation also contains User's Guide and Release notes.
Specifications
Identity
Files
Note: some files may require an NDA depending on provider policy.
Provider
Learn more about CoaXPress IP core
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Frequently asked questions about CoaXPress IP cores
What is CoaXPress (CXP) Verification IP?
CoaXPress (CXP) Verification IP is a CoaXPress IP core from SmartDV Technologies listed on Semi IP Hub.
How should engineers evaluate this CoaXPress?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this CoaXPress IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.