ZUC Crypto Engine
The ZUC IP core is 3GPP confidentiality and integrity algorithms (EEA3/EIA3) stream cipher for telecommunication applications, re…
Overview
The ZUC IP core is 3GPP confidentiality and integrity algorithms (EEA3/EIA3) stream cipher for telecommunication applications, requiring high performance with reduced silicon resources. It is optimized for maximum throughput and minimum latency.
The unique architecture enables a high level of flexibility. The throughput and features unique to each application can be taken into account in order to select the most optimal configuration of the implemented IP.
Implementation aspects
Standardized AXI-4 and AHB (optional) I/O simplifies system integration. All our IP cores are delivered with software drivers to simplify ASIC or FPGA integration.
We are also offering other 3GPP IP cores, such as KASUMI (SCZ_IP_BA422) and SNOW3G (SCZ_IP_BA423).
Key features
- ASIC and FPGA
- ETSI specifications & OSCCA compliant
- Supports:
- EEA3 (confidentiality)
- EIA3 (integrity)
- Data interface: AMBA (AXI/AHB) with optional DMA
- Control interface: APB/AXI4-lite
Block Diagram
Benefits
- Optimized for maximum throughput and minimum latency
Applications
- 3GPP mobile telephony (GSM, UMTS, LTE, 5G)
- Secure mobile communications
What’s Included?
- Netlist or RTL
- Scripts for synthesis & STA
- Self-checking RTL test-bench on referenced vectors
- Documentation
Specifications
Identity
Files
Note: some files may require an NDA depending on provider policy.
Provider
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Frequently asked questions about Symmetric Cryptography IP cores
What is ZUC Crypto Engine?
ZUC Crypto Engine is a Symmetric Crypto IP core from Secure-IC listed on Semi IP Hub.
How should engineers evaluate this Symmetric Crypto?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Symmetric Crypto IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.