nQrux™ Confidential Computing Engine (CCE)
nQrux™ Confidential Computing Engine (CCE) offers customisable solutions protecting data, code execution, and AI (Artificial Inte…
32-bit CPU IP core - ISO 26262 Automotive Functional Safety Compliant
AndesCore™ D25F-SE is a 32-bit CPU IP core that supports ISO 26262 ASIL B level functional safety for automotive applications.
Future-proof IP for training and inference with leading performance per watt and per dollar
Tenstorrent develops AI IP with precision, anchored in RISC-V’s open architecture, delivering specialized, silicon-proven solutio…
Superscalar Out-of-Order Execution Multicore Cluster
AndesCore™ AX65 64-bit multicore CPU IP is a high-performance quad decode 13-stage superscalar out-of-order processor based on An…
optimized for generative AI applications running Transformer based NN models that enables efficient and simple system designs.
The highest performance RISC-V core is ideal for consumer applications or used in conjunction with a vector processor in the data…
The MIPS I8500™ Multi-Processing System (MPS) builds on a long history of high performance multi-threaded and multiprocessor IP p…
Programmable Root of Trust Family With DPA & Quantum Safe Cryptography
The RT-65x Root of Trust IP are fully programmable, FIPS 140-3 compliant hardware security anti-tamper cores offering security by…
The SiFive Performance™ P500 application processor features a thirteen-stage, triple-issue, out-of-order pipeline compatible with…
64-bit Multiprocessor with Level-2 Cache-Coherence
AndesCore™ AX45MP 64-bit multicore CPU IP is an 8-stage superscalar processor based on AndeStar™ V5 architecture.
32-Bit & 64-Bit High Performance Processor - 6-Stage Pipeline, Single-issue
600 Series processors include four different classes: N600 (32 bit), U600 (32 bit + MMU), NX600 (64 bit) and UX600 (64 bit + MMU).
The AXI-SBS is an integrated, verified, AMBA® compliant hardware/software system ready for embedded applications using processors…
The AHB-SBS is an integrated, verified, AMBA® 3.0 interconnect and peripherals subsystem ready for embedded applications using pr…
The APB-SBS subsystem integrates typical microcontroller peripherals connected on the an AMBA® APB bus with a bridge to AHB or AX…
64-bit CPU Core with Level-2 Cache Controller
The 64-bit AX27L2 is a 5-stage processor that supports the latest RISC-V specification, including “G” (“IMAFD”) standard instruct…
Compact High-Speed 32-bit CPU Core with Level-2 Cache
The 32-bit A27L2 is a 5-stage processor that supports the latest RISC-V specification, including “G” (“IMAFD”) standard instructi…
High performance Linux capable vector processor
The SiFive Intelligence VIU75 Standard Core is a single-core instantiation of our RISC-V application processor with vector extens…
U74-MC Multicore: four U74 cores and one S76 core
The SiFIve U74-MC Standard Core is the world's highest performance RISC-V application processor, capable of supporting full-featu…
U74 High performance Linux-capable RISC V processor
The SiFive U74 Standard Core is a single-core instantiation of the world's highest performance RISC-V application processor, capa…
U54 MC Multicore: four U54 cores and one S51 core
The SiFive U54-MC Standard Core is the world's first RISC-V application processor, capable of supporting full-featured operating …