A design path to success exists for ultra-low-voltage SoCs
The alien realm of ultra-low voltage (ULV) in chip design means supply voltages near or below transistor threshold voltages.
Vendor:
Faraday Technology
Category:
PLL
PLL IP, Input: 25MHz, Output: 156.25MHz, UMC 40nm LP process
Jitter clean integer-N LC-PLL for serdes, output frequency is 156.25M, input frequency is 25M for Low-Jitter Mode, 156.25M for Ji…
Overview
Jitter clean integer-N LC-PLL for serdes, output frequency is 156.25M, input frequency is 25M for Low-Jitter Mode, 156.25M for JitteRClean Mode. UMC 40nm LP Low-K Logic process.
Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| UMC | 40nm | LP | — |
Specifications
Identity
Part Number
FXLCPLL101HH0L
Vendor
Faraday Technology
Type
Silicon IP
Provider
HQ:
Taiwan
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Frequently asked questions about PLL IP cores
What is PLL IP, Input: 25MHz, Output: 156.25MHz, UMC 40nm LP process?
PLL IP, Input: 25MHz, Output: 156.25MHz, UMC 40nm LP process is a PLL IP core from Faraday Technology listed on Semi IP Hub. It is listed with support for umc.
How should engineers evaluate this PLL?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this PLL IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.