A design path to success exists for ultra-low-voltage SoCs
The alien realm of ultra-low voltage (ULV) in chip design means supply voltages near or below transistor threshold voltages.
Vendor:
Faraday Technology
Category:
PLL
PLL (Frequency Synthesizer) IP, Input: 133MHz - 266MHz, Output: Output: 133MHz - 266MHz, 266MHz - 533MHz, 533MHz - 1066MHz, UMC 0.13um HS/FSG process
Input 133MHz - 266MHz, output clock_1X 133MHz - 266MHz, output clock_2X 266MHz - 533MHz, output clock_4X 533MHz-1066MHz, frequenc…
Overview
Input 133MHz - 266MHz, output clock_1X 133MHz - 266MHz, output clock_2X 266MHz - 533MHz, output clock_4X 533MHz-1066MHz, frequency synthesizable PLL, UMC 0.13um HS/FSG Logic process.
Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| UMC | 130nm | HS | — |
Specifications
Identity
Part Number
FXPLL362HC0H
Vendor
Faraday Technology
Type
Silicon IP
Provider
HQ:
Taiwan
Learn more about PLL IP core
Faraday Reports Second Quarter 2026 Results
Second quarter consolidated revenues were NT$3,314 million, up 28% QoQ but down 27% YoY.
Crypto mining SoC unearths a need for custom IP
Would custom memory ease your SoC design?
A case study shows how custom memory design can adapt to functional, timing, or layout requirements of a particular SoC.
Faraday Reports First Quarter 2026 Results
First quarter consolidated revenues were NT$2,589 million, down 8% QoQ and 65% YoY. Gross profit was NT$1,225 million, up 3% QoQ but down 19% YoY, with gross margin reached 47.3%.
Faraday Delivers IP Solutions to Enable Endpoint AI Based on UMC’s 28nm SST eFlash
The comprehensive IP solution integrates SST eFlash controller and BIST, together with silicon-proven analog and high-speed interface PHY IPs, providing a stable and production-ready foundation for low-power, high-performance endpoint AI designs.
Frequently asked questions about PLL IP cores
What is PLL (Frequency Synthesizer) IP, Input: 133MHz - 266MHz, Output: Output: 133MHz - 266MHz, 266MHz - 533MHz, 533MHz - 1066MHz, UMC 0.13um HS/FSG process?
PLL (Frequency Synthesizer) IP, Input: 133MHz - 266MHz, Output: Output: 133MHz - 266MHz, 266MHz - 533MHz, 533MHz - 1066MHz, UMC 0.13um HS/FSG process is a PLL IP core from Faraday Technology listed on Semi IP Hub. It is listed with support for umc.
How should engineers evaluate this PLL?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this PLL IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.