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Vendor:
Faraday Technology
Category:
Single-Protocol PHY
PCI Express PHY IP, PCIe Gen-1, 1 Lanes, UMC 0.18um G2 process
PCI-Express PHY with PIPE interface, 1 lane PCI-E PHY, UMC 0.18um GII Logic (RVT) process.
Overview
PCI-Express PHY with PIPE interface, 1 lane PCI-E PHY, UMC 0.18um GII Logic (RVT) process.
Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| UMC | 180nm | G | — |
Specifications
Identity
Part Number
FXPCIE100HA0A
Vendor
Faraday Technology
Type
Silicon IP
Standards & Interfaces
Supported Standards
PCIe Gen1
Provider
HQ:
Taiwan
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Frequently asked questions about Single-Protocol PHY IP
What is PCI Express PHY IP, PCIe Gen-1, 1 Lanes, UMC 0.18um G2 process?
PCI Express PHY IP, PCIe Gen-1, 1 Lanes, UMC 0.18um G2 process is a Single-Protocol PHY IP core from Faraday Technology listed on Semi IP Hub. It is listed with support for umc.
How should engineers evaluate this Single-Protocol PHY?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Single-Protocol PHY IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.