UALink IP Cores

Welcome to the ultimate UALink IP hub! Explore our vast directory of UALink IP cores.

UALink 1.0 IP Cores will enable up to 200Gbps per lane scale-up connection for up to 1024 accelerators within an AI pod.

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Compare 2 UALink IP Cores from 2 vendors (1 - 2)

Simulation VIP for UALink
- The Ultra Accelerator Link (UALink) Verification IP (VIP) provides a complete bus functional model (BFM) with integrated automatic protocol checks for physical layer in addition to Media Independent Interface (MII).
- Designed for easy integration in testbenches at IP, SoC, and system levels, the VIP helps engineers reduce time to first test, accelerate verification closure, and ensure end-product quality.
Verification IP for UALink
- API based transaction flow for ease of use
- Specification linked Protocol checks and functional coverage
- Exceptions, callback, error injection and analysis ports for Scoreboard
- TLM ports at each layer for traffic tracing
- Configurable timers for threshold testing