Vendor: Synopsys, Inc. Category: UALink

UALink IP Solution

The UALink IP solution, consisting of UALink Controller, PHY, and verification IP, is designed to meet the performance requiremen…

Overview

The UALink IP solution, consisting of UALink Controller, PHY, and verification IP, is designed to meet the performance requirements for AI Accelerator to AI Accelerator connections in the scale-up of AI clusters, compliant to the upcoming UALink Consortium specification. The best-in-class IP solution provides a standards-based option for AI hardware required to scale-up high density AI Accelerator to AI Accelerator connections, supporting rates up to 200Gbps per lane. Synopsys’ complete UALink IP delivers a low-risk, standards solution optimized for power, performance, area and latency. Leveraging Synopsys’ extensive PCIe and Ethernet expertise and a proven track record in high-speed networking, AI and HPC SoC designs, designers can accelerate time-to-market and develop best in class AI hardware infrastructure, enabling a path to first pass silicon success.

Key features

  • Lightweight, low latency IP solution for XPU to XPU interconnects optimized for AI workloads
  • Fully integrated IP solution for AI accelerators (XPUs), GPUs, and switches
  • Enables maximum throughput with up to 200Gbps per lane
  • Supports memory sharing capabilities to expand compute and memory resources from XPU to XPU
  • Supports high density, high radix networking infrastructure for AI workloads
  • Enables full hardware security needs for UALink specifications

Block Diagram

Benefits

  • Maximize AI cluster throughput with up to 200 Gbps per lane
  • Unlock memory sharing and extend compute resources across accelerators
  • Speed verification time with built-in protocol checks
  • Reduce integration risk with complete, standards-based IP solution

Specifications

Identity

Part Number
ultra_accelerator_link_cs
Vendor
Synopsys, Inc.
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

Learn more about UALink IP core

How Ultra Ethernet And UALink Enable High-Performance, Scalable AI Networks

This article delves into the technical aspects of how scaling up and out is becoming a critical need for HPC and AI chip developers, and how new standards such as Ultra Ethernet and Ultra Accelerator Link (UALink) aim to tackle the challenges of high-bandwidth, low-latency connectivity and efficient resource management.

Synopsys Interconnect IPs Enabling Scalable Compute Clusters

With more than 25 years of experience in delivering field-proven silicon IP solutions, we are thrilled to partner with NVIDIA and the NVIDIA NVLink ecosystem to enable and accelerate the creation of custom AI silicon. This strategic collaboration will leverage Synopsys' expertise in silicon IPs to assist in the development of bespoke AI silicon, forming the foundation for advanced compute clusters aimed at delivering the next generation of transformative AI experiences.

Frequently asked questions about UALink IP cores

What is UALink IP Solution?

UALink IP Solution is a UALink IP core from Synopsys, Inc. listed on Semi IP Hub.

How should engineers evaluate this UALink?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this UALink IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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