The " extensible interface" (AXI) bus is a high-performance parallel bus that connects on-chip peripheral circuits (or IP blocks)…
- Protocol Bridge
- Released
- Now
- Yes
Interface and connectivity IP cores enable communication between components, chips, and systems in modern SoC and ASIC designs.
These IP cores implement a wide range of communication standards including high-speed serial interfaces, on-chip interconnects, chiplet and die-to-die links, and low-speed control interfaces.
This catalog allows you to explore and compare connectivity IP cores from leading vendors based on bandwidth, latency, protocol support, and process node compatibility.
Whether you are designing high-performance computing systems, data center processors, automotive platforms, or embedded systems, you can find the right interface IP for your communication requirements.
The " extensible interface" (AXI) bus is a high-performance parallel bus that connects on-chip peripheral circuits (or IP blocks)…
100BASE-T1 (OABR) Ethernet PHY IEEE 802.3bw Compliant
CT25204 is a physical layer for Open Alliance BroadR-Reach® and IEEE 802.3bw Ethernet communication within the car.
The AL-USB2D-CTRL fully synthesizable core implements a high/full-speed (480Mbps/12Mbps) peripheral controller that interfaces to…
No charge paramaterizable core which utilizes the serial I/O transceivers available in the Kintex® UltraScale™, Virtex® UltraScal…
The Xilinx® LogiCORE™ IP UltraScale™ architecture integrated IP core for Interlaken is a scalable chip-to-chip interconnect proto…
UltraScale Integrated 100G Ethernet MAC/PCS
Xilinx offers an integrated 100 Gigabit per second (Gbps) Ethernet Media Access Controller (MAC) and Physical Coding Sublayer (PC…
UltraScale Gen3 Integrated Block for PCI Express (PCIe)
Xilinx provides a PCI Express Gen3 Integrated block for PCI Express® (PCIe) in the UltraScale™ family of FPGAs.
UltraScale FPGAs Transceivers Wizard
The LogiCORE™ IP UltraScale™ FPGAs Transceivers Wizard generates customized HDL to configure the UltraScale FPGA on-chip serial t…
UHD Serial Digital Interface (UHD-SDI)
The UHD Serial Digital Interface (UHD-SDI), is widely used in broadcast applications for the transport of uncompressed digital vi…
Supports emerging standards for lowering cost of uncompressed HD video transport Reduce the cost of multichannel SD/HD/3G-SDI des…
The LogiCORE™ IP SDI Tx and RX Video Bridge cores are designed to interface the SDI ports of the SMPTE SDI core to the video port…
Memory Interface is a free software tool used to generate memory controllers and interfaces for Xilinx® FPGAs.
LogiCore AXI to AHB-Lite Bridge IP
Included at no additional charge with Vivado Design and System edition of software.
IBERT for UltraScale GTY Transceivers
The customizable LogiCORE™ IP Integrated Bit Error Ratio Tester (IBERT) core for UltraScale™ architecture GTY transceivers is des…
IBERT for UltraScale GTH Transceivers
The customizable LogiCORE™ IP Integrated Bit Error Ratio Tester (IBERT) core for UltraScale architecture GTH transceivers is desi…
IBERT for 7 Series GTZ Transceivers
The customizable LogiCORE™ IP Integrated Bit Error Ratio Test (IBERT) core for 7 series FPGA GTZ transceivers is designed for eva…
The Xilinx® HDMI solutions include HDMI TX and RX subsystems.
The HARD_TEMAC described in this document has been designed incorporating the applicable features described in IEEE Std.
Ethernet 1G/2.5G BASE-X PCS/PMA or SGMII
The Xilinx Ethernet 1G/2.5G PCS/PMA or SGMII IP LogiCORE™ provides an Ethernet Physical Coding Sublayer (PCS) with a choice of ei…
DMA for PCI Express (PCIe) Subsystem
The Xilinx® LogiCORE™ DMA for PCI Express® (PCIe) implements a high performance, configurable Scatter Gather DMA for use with the…