The PCIe 3.0 (Peripheral Component Interconnect Express 3.0) is a computer hardware interface standard that is used to connect va…
- PCI Express
PCI Express (PCIe) IP cores enable high-speed serial communication between components in modern SoC and ASIC designs, delivering scalable bandwidth and low-latency connectivity.
These IP cores support multiple generations including PCIe Gen3, Gen4, Gen5, and Gen6, and include controller, PHY, endpoint, and root complex implementations.
This catalog allows you to compare PCIe IP cores from leading vendors based on data rate, latency, power efficiency, and process node compatibility.
Whether you are designing data center systems, AI accelerators, storage platforms, or high-performance computing systems, you can find the right PCIe IP for your connectivity requirements.
The PCIe 3.0 (Peripheral Component Interconnect Express 3.0) is a computer hardware interface standard that is used to connect va…
Scalable Switch Intel® FPGA IP for PCI Express
The Scalable Switch Intel® FPGA IP for PCI Express is a fully configurable switch that implements one fully configurable upstream…
Agilex™ 5 FPGAs and SoC FPGAs are monolithic designs with integrated high-speed transceivers (GTS) and hardened PCIe controller I…
The F-Tile Intel® Hard IP supports PCIe* configurations up to 4.0 x16 in Endpoint (EP), Root Port (RP), and Transaction Layer (TL…
Intel® Arria® 10 and Intel® Cyclone® 10 PCIe Hard IP
Intel® Arria® 10 and Intel® Cyclone® 10 GX FPGAs include a configurable, hardened protocol stack for PCI Express* that is complia…
Multichannel DMA Intel FPGA IP for PCI Express*
The Multichannel DMA IP for PCI Express provides high efficiency, speed, and configuration flexibility to support various applica…
PCIe Gen 6 controller IP
PCIe Gen 5 - Validates high-speed designs, ensuring compliance and error-free performance
PCIe Gen 5 Verification IP offers a robust solution for validating designs based on the PCI Express 5.0 specification, delivering…
PCIe Gen 4 - Enables high-speed verification, error handling, and protocol compliance
PCIe Gen 4 Verification IP ensures efficient, high-speed signaling, protocol conformance, error handling, and system interoperabi…
The Cadence® PIPE PHY Verification IP (VIP) provides a mature, capable verification solution for the PHY layer of complex protoco…
Used by all PCIe, IP, and SoC design verification teams for all generations.The Cadence® Verification IP (VIP) for PCI Express® (…
FPGA Proven PCIe Gen6 Controller IP
Deployed in Tier 1 Leaders.
PCIe Controller for USB4 with AXI
The PCIe Controller for USB4 (formerly XpressRICH) is a configurable and scalable PCIe controller IP designed for ASIC and FPGA i…
The PCIe Controller for USB4 (formerly XpressRICH) is a configurable and scalable PCIe controller IP designed for ASIC and FPGA i…
PCIe Controller for USB4 supporting up to PCIe 4.0 with AMBA interface
The configurable and scalable the Controller IP for PCI Express® (PCIe®) supports all required features of the PCI Express 5.0, 4…
PCIe Controller for USB4 supporting up to PCIe 4.0
The configurable and scalable the Controller IP for PCI Express® (PCIe®) supports all required features of the PCI Express 5.0, 4…
PCIe 5.0 (Gen5) Standard Controller with AMBA bridge II
The configurable and scalable the Controller IP for PCI Express® (PCIe®) supports all required features of the PCI Express 5.0, 4…
PCIe 5.0 (Gen5) Standard Controller EP/RP/DM/SW 32-128 bits with AMBA bridge
The configurable and scalable the Controller IP for PCI Express® (PCIe®) supports all required features of the PCI Express 5.0, 4…
PCIe 5.0 (Gen5) Standard Controller EP/RP/DM/SW 32-128 bits
The configurable and scalable the Controller IP for PCI Express® (PCIe®) supports all required features of the PCI Express 5.0, 4…
PCIe 5.0 (Gen5) Premium Controller with AMBA bridge II
The configurable and scalable the Controller IP for PCI Express® (PCIe®) supports all required features of the PCI Express 5.0, 4…