Vendor: TES Electronic Solutions Category: PLL

Integer-N-PLL-based HF Frequency Synthesizer and Clock Generator with integrated Loop Filter and VCO

This integer-N PLL synthesizes 3.3V-square-wave FVCO frequencies within the HF range from 2.424MHz up to 9.697MHz, by steps of 18…

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Overview

This integer-N PLL synthesizes 3.3V-square-wave FVCO frequencies within the HF range from 2.424MHz up to 9.697MHz, by steps of 18.9393kHz, and provides one fourth of fVCO on two other outputs, FDEM and FDRV, which feature quadrature phase difference or no phase shift depending on the control bit PH_SEL.

The PLL-locked state within ±0.08% of fVCO is signaled by a logic high level on the LOCK output.

The PLL operates with three supply voltages, VDDA5 (5V typical), VDDA4 (4V typical from the additional IP TS_VR_4V00_X8) for the analog and test-bus (ATB) circuits and VDD3V3 (3.3V typical from the additional IP TS_VR_3V30_X8) for the digital circuits.

The PLL is meant for on-chip internal operation. Its inputs or outputs that need access to bond pads will require the insertion of ESD-protected buffers. The ATB path complies with 2kV electrostatic discharges.

The minimum continuous operation lifetime spans 100000 hours.

Operating conditions

Parameters Values
Junction temperature range 20ºC to +80ºC
Supply voltages VDDA5: 4.9V to 5.1V
VDDA4: 3.9V to 4.1V (supplied by the additional IP Reg_4V)
VDD3V3: 3.2V to 3.4V (supplied by the additional IP Reg_3V3)
Reference sourced current intensity I(IBPU): 19.5µA to 20.5µA (supplied by the additional IP Bias)
FREF-input reference frequency 8.333MHz or 10.000MHz

Specification

Parameters Values
FVCO-output frequency range 2.424MHz to 9.697MHz
FVCO frequency step size 18.9393kHz
FDRV-/FDEM-output frequency range 606.06kHz to 2.424MHz
FVCO period jitter @2.424MHz 271psRMS max
PLL lock time upon power on 4.95ms max
LOCK response time to PLL-locked state 150ms max
Operating power consumption Enable EN high, active-low reset RSTB high 870µW max
Powerdown-mode current consumption Enable EN low 187nA max
Area 0.16mm²

Block Diagram

TS_FS_9M70_X8 block diagram

Specifications

Identity

Part Number
TS_FS_9M70_X8
Vendor
TES Electronic Solutions
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Contact TES Electronic Solutions

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Frequently asked questions about PLL IP cores

What is Integer-N-PLL-based HF Frequency Synthesizer and Clock Generator with integrated Loop Filter and VCO?

Integer-N-PLL-based HF Frequency Synthesizer and Clock Generator with integrated Loop Filter and VCO is a PLL IP core from TES Electronic Solutions listed on Semi IP Hub.

How should engineers evaluate this PLL?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this PLL IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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