The Platform Based SOC Design that Utilizes Structured ASIC Technology
The Platform Based SOC Design that Utilizes Structured ASIC Technology
Vendor:
Faraday Technology
Category:
PLL
Input 25M-66M Hz, output 400M-800M Hz, frequency synthesizable PLL using MIFS C40LP Logic Process
Input 25M-66M Hz, output 400M-800M Hz, frequency synthesizable PLL using MIFS C40LP Logic Process
Overview
Input 25M-66M Hz, output 400M-800M Hz, frequency synthesizable PLL using MIFS C40LP Logic Process
Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| Fujitsu | 40nm | LP | — |
Specifications
Identity
Part Number
FXPLL360HH6L
Vendor
Faraday Technology
Type
Silicon IP
Provider
HQ:
Taiwan
Learn more about PLL IP core
Frequently asked questions about PLL IP cores
What is Input 25M-66M Hz, output 400M-800M Hz, frequency synthesizable PLL using MIFS C40LP Logic Process?
Input 25M-66M Hz, output 400M-800M Hz, frequency synthesizable PLL using MIFS C40LP Logic Process is a PLL IP core from Faraday Technology listed on Semi IP Hub. It is listed with support for fujitsu.
How should engineers evaluate this PLL?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this PLL IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.