Vendor: VeriSilicon Microelectronics (Shanghai) Co., Ltd. Category: DAC

IBM 65nm CMOS 3-Channel 10-Bit 350Msps+ Current-Steering D/A Converter

This IP specifies a 3-channel 10-bit resolution, high performance, low power CMOS Digital-to-Analog Converter (DAC) which offers …

10 Bit IBM 65nm LPe View all specifications

Overview

This IP specifies a 3-channel 10-bit resolution, high performance, low power CMOS Digital-to-Analog Converter (DAC) which offers exceptional direct current and alternating current performance and supports update rates up to 350 MSPS with a power-down mode to reduce the standby power dissipation. It is fabricated in an advanced CMOS process. Segmented current source architecture is combined with a proprietary switching technique to reduce spurious components and enhance dynamic performance. Edge-triggered input latches and a temperature compensated bandgap reference have been integrated to provide a complete monolithic DAC solution.

Key features

  • Process: IBM 65nm LPE
  • Supply voltage: 2.5V Analog, 1.2V Digital Core Supply
  • Resolution: 10-Bit
  • Update rate: 350 MSPS+
  • Full scale current adjustable
  • Single end current output: 34.2mA Max
  • Power dissipation: <300mW @ 2.5 V
  • On-chip bandgap reference
  • On-chip test bench
  • Load auto-detection feature
  • Temperature: -40~125 C

Silicon Options

Foundry Node Process Maturity
IBM 65nm LPe

Specifications

Identity

Part Number
I65LPEV25_DAC_06
Vendor
VeriSilicon Microelectronics (Shanghai) Co., Ltd.
Type
Silicon IP

Analog

Resolution bits
10 Bit

Provider

Learn more about DAC IP core

Specifying a PLL Part 1: Calculating PLL Clock Spur Requirements from ADC or DAC SFDR

In high end RF systems, such as 5G radios, the requirements are so stringent that the source of this strongest unwanted tone can be the PLL. This article outlines how spurs in the input clock to the ADC or DAC may limit the SFDR. This in turn will set the requirements for the spurs for the input clock (from a PLL), in order to achieve a specific SFDR.

Frequently asked questions about DAC IP cores

What is IBM 65nm CMOS 3-Channel 10-Bit 350Msps+ Current-Steering D/A Converter?

IBM 65nm CMOS 3-Channel 10-Bit 350Msps+ Current-Steering D/A Converter is a DAC IP core from VeriSilicon Microelectronics (Shanghai) Co., Ltd. listed on Semi IP Hub. It is listed with support for ibm.

How should engineers evaluate this DAC?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this DAC IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP