HDMI 2.1 Rx PHY 12Gbps in Samsung (14nm)
The Synopsys HDMI 2.1 RX Controller and PHY IP solutions, compliant with the High-Definition Multimedia Interface (HDMI) 2.1 spec…
HDMI 2.1 eARC Tx PHY in Samsung (14nm)
The Synopsys HDMI 2.1 RX Controller and PHY IP solutions, compliant with the High-Definition Multimedia Interface (HDMI) 2.1 spec…
HDMI 2.1 Audio PLL in Samsung (14nm)
The Synopsys HDMI 2.1 RX Controller and PHY IP solutions, compliant with the High-Definition Multimedia Interface (HDMI) 2.1 spec…
HDMI 2.0 RX PHY in Samsung (8nm)
The Synopsys HDMI Receiver (RX) IP solutions are compliant with the High- Definition Multimedia Interface (HDMI) 2.0 and 1.4 spec…
MIPI M-PHY G5 Type 1 2Tx2Rx in Samsung (14nm)
The silicon-proven Synopsys MIPI® M-PHY IP, compliant with the latest MIPI M-PHY v5.0 specification, supports speeds up to 23.32 …
LPDDR5X/5/4X PHY in Samsung (SF4X)
The Synopsys LPDDR5X/5/4X PHY is Synopsys’ physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) an…
LPDDR5/4/4X PHY in Samsung (14nm) for Automotive
The Synopsys LPDDR5/4/4X PHY is Synopsys’ physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and…
LPDDR4X multiPHY in Samsung (14nm, 11nm)
The Synopsys LPDDR4 multiPHY is Synopsys’ second generation physical (PHY) layer IP interface solution for ASICs, ASSPs, system-o…
LPDDR4 multiPHY V2 in Samsung (8nm) for Automotive
The Synopsys LPDDR4 multiPHY is Synopsys’ second generation physical (PHY) layer IP interface solution for ASICs, ASSPs, system-o…
DDR5/4 PHY in Samsung (10nm, 8nm, 7nm)
The Synopsys DDR5/4 PHY is a physical layer IP interface (PHY) solution for ASIC, ASSP, and system-on-chip (SoC) applications req…
All Digital Fractional-N RF Frequency Synthesizer PLL in Samsung 14LPP
The DeepSub™ pPLL08F is an all digital RF frequency synthesizer PLL featuring industry jitter (sub 300fs), phase noise and compac…
All Digital Fractional-N RF Frequency Synthesizer PLL in Samsung 8LPP
The DeepSub™ pPLL08F is an all digital RF frequency synthesizer PLL featuring industry jitter (sub 300fs), phase noise and compac…
All Digital Fractional-N PLL for Performance Computing in Samsung 14LPP
The DeepSub™ pPLL03F is an all digital PLL featuring low-jitter and compact area suitable for clocking applications with critical…
All Digital Fractional-N PLL for Performance Computing in Samsung 8LPP
The DeepSub™ pPLL03F is an all digital PLL featuring low-jitter and compact area suitable for clocking applications with critical…
PCIe 4.0 PHY in Samsung (14nm, 11nm, SF5A, SF2)
The multi-channel Synopsys PHY IP for PCI Express® 4.0 includes Synopsys’ high-speed, high-performance transceiver to meet today’…
16G PHY in Samsung (14nm, 11nm)
The silicon-proven Synopsys IP solution, consisting of configurable digital controllers, PHYs, Integrity and Data Encryption (IDE…
LPDDR4 multiPHY V2 in Samsung (14nm, 11nm, 10nm, 8nm)
The Synopsys LPDDR4 multiPHY is Synopsys’ second generation physical (PHY) layer IP interface solution for ASICs, ASSPs, system-o…
DDR4/3 PHY in Samsung (14nm, 11nm, 10nm, 8nm)
The Synopsys DDR4/3 PHY is a physical layer IP interface (PHY) solution for enterprise-class ASIC, ASSP, and system-on-chip (SoC)…
DDR4 multiPHY in Samsung (14nm)
The Synopsys DDR4 multiPHY is a physical (PHY) layer IP interface solution for PC/consumer and mobile ASICs, ASSPs, system-on- ch…
USB 3.1 PHY (10G/5G) in Samsung (14nm, 11nm, 10nm, 8nm, SF5, SF5A, SF4E)
The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum.