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Compare 85 LDPC IP from 19 vendors (1 - 10)
  • DVB-Satellite FEC Decoder
    • The CMS0077 Satellite FEC Decoder has been designed specifically to meet the requirements of the DVB-S2 and DVB-S2X advanced wide-band digital satellite standards.
    • The core provides all the necessary processing steps to convert a demodulated complex I/Q signal into a standard TS output stream.
    Block Diagram -- DVB-Satellite FEC Decoder
  • SDA OCT Encoder and Decoder
    • ​Compliant with "Optical Communications Terminal (OCT) Standard Version 3.0, Document ID: SDA-9100-001-05, August 2021"
    • Compliant with "Optical Communications Terminal (OCT) Standard Version 3.1.0, Document ID: SDA-9100-001-08, March 2024"
    • Compliant with "Optical Communications Terminal (OCT) Standard Version 4.0.0, Document ID: SDA-9100-001-09, August 2024"
    Block Diagram -- SDA OCT Encoder and Decoder
  • DVB-S2-LDPC-BCH IP
    • Irregular parity check matrix
    • Layered Decoding
    • Minimum sum algorithm
    • Soft decision decoding
    Block Diagram -- DVB-S2-LDPC-BCH IP
  • LDPC Decoder IS-GPS-800D IP
    • Irregular parity check matrix
    • Layered Decoding
    • Minimum sum algorithm
    • Configurable number of iterations
    Block Diagram -- LDPC Decoder IS-GPS-800D IP
  • DOCSIS 3.1 LDPC Decoder (PLC / NCP / Data)
    • Soft-Decision Demapper, Derandomizer, Deinterleaver, Depuncturer, and LDPC Decoder are included
    • Support for 4k and 8K FFT sizes
    • Support for 16-QAM modulation
    Block Diagram -- DOCSIS 3.1 LDPC Decoder (PLC / NCP / Data)
  • DVB-S2X Wideband BCH and LDPC Decoder
    • Compliant with DVB-S2 and DVB-S2X
    • Support for decoding of BBFRAMEs
    • Support for ACM, CCM, and VCM
    Block Diagram -- DVB-S2X Wideband BCH and LDPC Decoder
  • LDPC Encoder / Decoder
    • Support 1KB+/2KB+/4KB+ codeword size for one time configuration
    • Support code rate (CR) range 0.93~0.83(down to 0.71)
    • Support configurable throughput, ranges from 300MB/s to 16GB/s
    • Support hard-bit decode (HBD) and up to 6bit soft-bit decode (SBD)
    Block Diagram -- LDPC Encoder / Decoder
  • DVB-S2-LDPC-BCH
    • Irregular parity check matrix
    • Layered decoding
    • Minimum sum algorithm
    • Soft decision decoding
    • BCH decoder works on GF (2m) where m=16 or 14 and corrects up to t errors, where t = 8, 10 or 12
    Block Diagram -- DVB-S2-LDPC-BCH
  • LDPC Decoder IS-GPS-800D
    • Irregular parity check matrix
    • Layered Decoding
    • Minimum sum algorithm
    • Configurable number of iterations
    • Soft decision decoding
    Block Diagram -- LDPC Decoder IS-GPS-800D
  • LDPC Encoder / Decoder for 3GPP 5G NR
    • The LDPC decoder product suite has been specifically designed as flexible IP to address the unique challenges of 5G NR across all use cases covered by the current standards, deliver market leading performance and efficiency, and be easily integrated into designs.
    Block Diagram -- LDPC Encoder / Decoder for 3GPP 5G NR
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