Vendor: Eureka Technology, Inc. Category: DMA

DMA Controller

DMA Controller

Key features

  • Multiple independent DMA channels
  • Designed with synthesizable HDL for ASIC and PLD implementations in various system environments
  • Each channel programmable to two types of DMA transfers: memory-to-memory and memory-to-I/O data transfer.
  • Supports both hardware initiated transfer and software initiated transfers.
  • Programmable burst and single data transfer.
  • Internal arbitration logic for multiple DMA channels.
  • Interrupt generation on transfer completion.
  • Optional DMA chaining for multiple DMA sessions.
  • Differentiating Features
    • Select number of DMA channels.
    • Program number of bits in the transfer control registers.
    • Chose a fix or rotating arbiter priority scheme.

Block Diagram

EP660 block diagram

Specifications

Identity

Part Number
EP660
Vendor
Eureka Technology, Inc.
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Learn more about DMA IP core

Toki: Profiling HBM Performance on FPGA Systems with RISC-V Soft Cores and PCIe Host DMA Traffic

Toki, released as open source, is the first hardware-software framework that enables profiling the performance of HBM on FPGA accelerator cards by jointly considering (i) the execution of workloads on RISC-V soft cores instantiated on the FPGA and (ii) the injection of memory traffic from the host system via DMA over PCIe, providing insights that cannot be obtained with synthetic traffic generators alone.

DMA IP Integration

There are many IP’s today . These IP’s can be simple IP’s like Timer to complex IP’s like Accelerators. In Most of the cases IP’s are Integrated in standard way. There are cases where you have the option of Integrating it differently. This goes un-noticed or unable to be implemented due to time constraints. One such IP that would be discussed in this paper is DMA . This paper tries to explain idea of Integrating Direct Memory access(DMA) and Interrupt Control Unit(ICU) differently but final implementation requires some changes in IP. There is a possibility that alternate design explained below may be already implemented.

Enter the Arena: How Our Toolchain Started Improving Itself

It started with me prompting an agent to shave cycles off a customer's model, one region at a time. It became an internal arena where engineers and their agents compete to make Chimera kernels faster, an oracle that checks every result bit for bit, and a pipeline that feeds the best ideas back into our compiler.

Frequently asked questions about DMA IP

What is DMA Controller?

DMA Controller is a DMA IP core from Eureka Technology, Inc. listed on Semi IP Hub.

How should engineers evaluate this DMA?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this DMA IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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