What is Peripheral Direct Memory Access Controller?
Peripheral Direct Memory Access Controller is a DMA IP core from ChipCraft listed on Semi IP Hub.
Vendor:
ChipCraft
Category:
DMA
Peripheral Direct Memory Access Controller
The CC-PDMA-AXI-AXI is a synthesisable Verilog model of a peripheral direct memory access controller.
Overview
The CC-PDMA-AXI-AXI is a synthesisable Verilog model of a peripheral direct memory access controller. The PDMA core can be efficiently implemented on FPGA and ASIC technologies.
Key features
- AMBA AXI4-Lite slave bus
- AMBA AXI4 master bus
- Configurable number of peripheral channels
- 8, 16, 32 bits data transfer modes
- Upstream and downstream data aggregation to 32 bit chunks
- Various address modes
- Various arbiter priority schemes
- Circular buffer support
- Configurable independent upstream and downstream FIFOs
- Maskable interrupts
- Dedicated upstream and downstream peripherals DMA interface
- Fully synthesizable synchronous design with positive edge clocking
- DFT ready
Block Diagram
CC-PDMA-AXI-AXI block diagram
Benefits
- Synthesizable RTL Verilog source code
- Technology independent IP Core
- Suitable for FPGA and ASIC
- Silicon and FPGA proven
- Easy SoC integration
- Full implementation and maintenance support with individual approach
- Flexible licensing scheme
What’s Included?
- Verilog RTL source code
- Verification suite
- Datasheet and integration guide
- C-header file
- Constraints
- Technical support
Specifications
Identity
Part Number
CC-PDMA-AXI-AXI
Vendor
ChipCraft
Type
Silicon IP
Files
Note: some files may require an NDA depending on provider policy.
Provider
HQ:
Poland
Frequently asked questions about DMA IP
How should engineers evaluate this DMA?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this DMA IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.