3GPP UMTS LTE 3GPP2 cdma2000 1xEV-DV 1xEV-DO 8 state turbo encoder
This is a high speed 8 state 3GPP™ (UMTS and LTE) and 3GPP2 cdma2000 (1xEV-DV Release D and 1xEV-DO Release B) compatible paralle…
- Channel Coding
- Now
- 3GPP TS 25.212 V5.2.0 Relea…
Discover DSP and Math IP for digital signal processing, arithmetic acceleration, and compute-intensive algorithms in semiconductor designs. This category includes IP cores optimized for filtering, transforms, vector processing, fixed-point and floating-point computation, and real-time signal manipulation.
Compare DSP and Math IP by processing architecture, supported numeric formats, throughput, latency, programmability, power efficiency, and target application. These IP solutions are widely used in communications, audio, vision, radar, industrial control, AI preprocessing, and embedded compute platforms.
3GPP UMTS LTE 3GPP2 cdma2000 1xEV-DV 1xEV-DO 8 state turbo encoder
This is a high speed 8 state 3GPP™ (UMTS and LTE) and 3GPP2 cdma2000 (1xEV-DV Release D and 1xEV-DO Release B) compatible paralle…
Enabling Next-Generation Voice AI and Immersive Audio Applications With the rise of immersive audio and AI in home entertainment,…
Parameterizable compact BCH codec
The core targets the lower-performance error correction applications using Bose–Chaudhuri–Hocquenghem codes (BCH codes) that prio…
Double & Single Precision IEEE-754 complete FPU
The A2FD is a fully synthesizable module implemented in Verilog RTL.
Very high performance IEEE-754 modules
The A2FM product is a collection of floating-point execution units compliant with the ANSI/IEEE Std 754-1985, IEEE Standard for B…
Flow's Parallel Processing Unit solves one of computing's most fundamental dilemmas - parallel processing.
Multi-channel DVB-C / J83 FEC encoder
The CMS0044 J.83abc/DVB-C Cable FEC Encoder combines all of the channel coding and Forward Error Correction functions specified b…
The CMS0045 ISDB-T Modulator provides all the necessary processing steps to modulate one, two or three transport stream into a co…
The CMS0077 Satellite FEC Decoder has been designed specifically to meet the requirements of the DVB-S2 and DVB-S2X wide-band dig…
Forward-error correction (FEC) channel codes commonly improve the energy efficiency of wireless communication systems.
A numerically controlled oscillator (NCO) is a digital signal generator, which synthesizes a discrete-time, discrete-valued repre…
The CIC Intel FPGA IP core implements a Cascaded integrator-comb (CIC) filter with data ports that are compatible with the Avalon…
The 5G Polar Intel® FPGA IP implements a forward error correction (FEC) encoder and decoder based on polar codes compliant with t…
Low-density parity-check (LDPC) codes are linear error correcting codes that help you to transmit and receive messages over noisy…
OFDM - Orthogonal Frequency Division Multiplexing
OFDM - Orthogonal Frequency Division Multiplexing
100G UDP Offload Engine - Offloads UDP packet processing for efficient, high-speed networking
The 100G UDP Offload Engine in Verification IP (VIP) offloads UDP packet processing to specialized hardware, enhancing data trans…
100G TCP/IP Offload Engine - Validates high-speed network traffic, optimizing flow and reliability
The 100G TCP/IP Offload Engine is a cutting-edge Verification IP designed to streamline the testing of high-speed networking inte…
Error Correcting Code for SRAMs
The ECC-SRAM core adds protection against SRAM data corruption.
512-bit Vector DSP IP, Single Core with Functional Safety
The ASIL B and C compliant ARC® VPXxFS DSP IP is a family of VLIW/SIMD processors enabling automotive system-on-chip (SoC) design…
512-bit Vector DSP IP, Quad Core with Functional Safety
The ASIL B and C compliant ARC® VPXxFS DSP IP is a family of VLIW/SIMD processors enabling automotive system-on-chip (SoC) design…