The Platform Based SOC Design that Utilizes Structured ASIC Technology
The Platform Based SOC Design that Utilizes Structured ASIC Technology
Vendor:
Faraday Technology
Category:
DMA
AXI system Peripheral IP, DMA controller for AXI master port and slave port (32 - bit, 64 - bit and 128 - bit), 8 channels DMA, Soft IP
DMA controller with AXI interface.
Overview
DMA controller with AXI interface.
Specifications
Identity
Part Number
FTDMAC030
Vendor
Faraday Technology
Type
Silicon IP
Provider
HQ:
Taiwan
Learn more about DMA IP core
DMA IP Integration
There are many IP’s today . These IP’s can be simple IP’s like Timer to complex IP’s like Accelerators. In Most of the cases IP’s are Integrated in standard way. There are cases where you have the option of Integrating it differently. This goes un-noticed or unable to be implemented due to time constraints. One such IP that would be discussed in this paper is DMA . This paper tries to explain idea of Integrating Direct Memory access(DMA) and Interrupt Control Unit(ICU) differently but final implementation requires some changes in IP. There is a possibility that alternate design explained below may be already implemented.
Using peripheral DMA boosts networked 32 bit MCU security and bandwidth
By Dany Nativel, Jacko Wilbrink and Tim Morin
New AXI Scatter-Gather DMA Core Transfers Streaming Data to/from System Memory
Moving to AMBA® 5? Your AMBA® 4 IP Can Still Come With You
As SoC architectures adopt AMBA® 5 fabrics and components, many proven IP blocks still rely on AMBA® 4 or earlier interfaces. That creates a common integration problem: how do designers connect newer AMBA® 5 system components to existing IP without redesigning the IP or replacing verified blocks?
Hitting the Memory Wall:Why Cache Miss Tolerance Defines CPU Performance Now
This article shares our experience using Google’s FlatBuffers library as a memory subsystem stress test on the Andes AX46MPV RISC-V core.
Frequently asked questions about DMA IP
What is AXI system Peripheral IP, DMA controller for AXI master port and slave port (32 - bit, 64 - bit and 128 - bit), 8 channels DMA, Soft IP?
AXI system Peripheral IP, DMA controller for AXI master port and slave port (32 - bit, 64 - bit and 128 - bit), 8 channels DMA, Soft IP is a DMA IP core from Faraday Technology listed on Semi IP Hub.
How should engineers evaluate this DMA?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this DMA IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.