Clocking and timing IP cores are fundamental to semiconductor designs that require accurate clock generation, distribution, synchronization, and timing control. This category includes PLLs, DLLs, oscillators, and clock generators used in SoCs, ASICs, SerDes subsystems, processors, memory interfaces, and communication devices.
Browse clocking and timing IP from multiple vendors to compare jitter, frequency range, locking behavior, power consumption, programmability, and process support. Semi IP Hub helps chip architects and design engineers identify the right timing IP for high-performance and low-power silicon platforms.
PCIe Gen4/5/6 Class Low Jitter LC PLL on TSMC CLN3P-CLN3X
The PCIe REF PLL addresses stringent performance requirements in high-speed serial link applications that support the PCI Express…
PCIe Gen4/5/6 Class Low Jitter LC PLL on TSMC CLN3E
The PCIe REF PLL addresses stringent performance requirements in high-speed serial link applications that support the PCI Express…
PCIe Gen4/5/6 Class Low Jitter LC PLL on TSMC CLN2P
The PCIe REF PLL addresses stringent performance requirements in high-speed serial link applications that support the PCI Express…
PCIe Gen4/5 Ref Clock SSCG PLL on GLOBALFOUNDRIES 12LP+
The PCIe REF PLL addresses stringent performance requirements in high-speed serial link applications that support the PCI Express…
PCIe Gen3 Class SSCG PLL on TSMC CLN16FFC
The PCIe Gen3 SSCG PLL addresses stringent performance requirements in high-speed serial link applications that support the PCI E…
PCIe Gen3 Class SSCG PLL on TSMC CLN12FFC
The PCIe Gen3 SSCG PLL addresses stringent performance requirements in high-speed serial link applications that support the PCI E…
PCIe Gen3 Class SSCG PLL on GLOBALFOUNDRIES 12LP+
The PCIe Gen3 SSCG PLL addresses stringent performance requirements in high-speed serial link applications that support the PCI E…
PCIe Gen3 Class SSCG PLL on GLOBALFOUNDRIES 12LP
The PCIe Gen3 SSCG PLL addresses stringent performance requirements in high-speed serial link applications that support the PCI E…
The PCIe REF PLL addresses stringent performance requirements in high-speed serial link applications that support the PCI Express…
Low Power Wide Range PLL on GLOBALFOUNDRIES 65LPE
The Low Power Wide Range PLL addresses markets and applications that demand very low power and optimized for area efficiencies.
Low Power Wide Range PLL on GLOBALFOUNDRIES 40LP
The Low Power Wide Range PLL addresses markets and applications that demand very low power and optimized for area efficiencies.
Low Power Wide Range PLL on GLOBALFOUNDRIES 28SLP
The Low Power Wide Range PLL addresses markets and applications that demand very low power and optimized for area efficiencies.
Low Power PLL on TSMC CLN90G-GT-LP
The low-power wide range PLL addresses markets and applications that demand very low power and optimized for area efficiencies.
The Low Power Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock…
Low Power PLL on TSMC CLN40LP-ULP
The Low Power Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock…
The Low Power Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock…
Low Power FracN/SSCG PLL on TSMC CLN6FF
The low power Fractional-N SSCG PLL addresses power sensitive designs required for IOT, mobile and other low power applications n…
Low Power Frac-N PLL on GLOBALFOUNDRIES 40LP
A programmable on-the-fly Fractional-N PLL is required to lock to an incoming clock source and produce an output clock.
Low Power Frac-N on TSMC CLN28HPC+
A programmable on-the-fly Fractional-N PLL is required to lock to an incoming clock source and produce an output clock.
Low Power Frac-N on TSMC CLN28HPC
A programmable on-the-fly Fractional-N PLL is required to lock to an incoming clock source and produce an output clock.