Vendor: Veriest Solutions Ltd. Category: Monitoring

AMBA AXI Performance Monitor

The Veriest AMBA AXI Performance Monitor Design IP provides a mechanism for analysis of embedded AMBA AXI fabric latency.

Overview

The Veriest AMBA AXI Performance Monitor Design IP provides a mechanism for analysis of embedded AMBA AXI fabric latency. This gives added visibility to the software in order to debug performance related issues in an SoC in simulation or on a fabricated chip. There is a configurable number of AXI interfaces than can be monitored. The statistics are collected in counters which are visible to the embedded CPU over an APB interface. The channels that are monitored are the write write address, write data, read address and read data.


Key features

  • Easy integraton
  • AMBA AXI 3.0 Compatible
  • Configurable number of AXI ports
  • Configurable statistics counter width
  • Counter enables
  • Counter clears
  • Wrap indications
  • Interrupt

Block Diagram

VV1800 block diagram

Benefits

  • Low Gate Count
  • Low Power Consumption
  • Spyglass Lint Validated
  • Standards Compliant

Applications

  • General System on Chip Use

What’s Included?

  • Synthesizable Verilog RTL
  • Detailed block diagram and technical documents

Specifications

Identity

Part Number
VV1800
Vendor
Veriest Solutions Ltd.
Type
Silicon IP

Provider

Learn more about Monitoring IP core

Scalable AXI4 Transaction Monitoring for Mixed-Criticality SoCs: From Phase-Level Precision to ID-Level Efficiency

Mixed-criticality Systems-on-Chip (SoCs) with on-chip interconnects based on the AXI4 open standard protocol lack a protocol-level timeout mechanism, exposing systems to deadlocks and missed real-time deadlines when subordinate devices or managers fail or stall due to hardware faults, radiation-induced upsets, or software errors. This work presents a configurable hardware intellectual property (IP), non-intrusive in fault-free operation, that detects AXI4 protocol violations and timing faults at runtime and restores interconnect liveness through a cut-and- drain isolation mechanism.

A Centralized Performance Monitoring Architecture for Heterogeneous Multicore SoCs

In this work, the authors propose a centralized performance monitoring architecture to efficiently collect, correlate, and process architectural events across multiple hardware components. Their design introduces Event Monitoring Units (EVUs) that capture and forward microarchitectural events to an Advanced Performance Monitoring Unit (APMU).

IMS: Intelligent Hardware Monitoring System for Secure SoCs

In the modern Systems-on-Chip (SoC), the Ad vanced eXtensible Interface (AXI) protocol exhibits security vulnerabilities, enabling partial or complete denial-of-service (DoS) through protocol-violation attacks. The recent counter- measures lack a dedicated real-time protocol semantic analysis and evade protocol compliance checks. This paper tackles this AXI vulnerability issue and presents an intelligent hardware monitoring system (IMS) for real-time detection of AXI protocol violations.

Same Chip, Two Destinies: How Power Profiles Improve With On-Chip Monitoring

What happens to critical power-related considerations when the same chip is handled two different ways, with or without visibility from within? This article begins by examining how the absence of on-chip monitoring impacts peak power, average power, and Di/Dt noise (rate of current change), as illustrated in the diagram below and the subsequent discussion. It then details how these aspects change when in-chip telemetry is available.

Runtime Energy Monitoring for RISC-V Soft-Cores

The authors propose a holistic approach to monitor energy consumption at runtime without the need of running complex (micro-)architectural models. Their approach is based on a measurement board coupled with a FPGA-based System-on-Module.

Frequently asked questions about system monitoring IP cores

What is AMBA AXI Performance Monitor?

AMBA AXI Performance Monitor is a Monitoring IP core from Veriest Solutions Ltd. listed on Semi IP Hub.

How should engineers evaluate this Monitoring?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Monitoring IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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