Why Hardware Monitoring Needs Infrastructure, Not Just Sensors
Discover why scaling modern SoCs requires more than just sensors. Learn how the proteanTecs hardware monitoring system uses a unified infrastructure to connect
Vendor:
Siemens Tessent Embedded Analytics
Category:
Monitoring
Tessent Status Monitor
The Tessent Embedded Analytics Status Monitor provides visibility and monitoring of any circuitry within a System-on-Chip (SoC).
Overview
The Tessent Embedded Analytics Status Monitor provides visibility and monitoring of any circuitry within a System-on-Chip (SoC). It affords many of the benefits of a logic analyzer, but with no need to bring signals off-chip.
The Status Monitor provides a wide variety of functions including debugging, reporting diagnostics, and performance profiling. It can be parameterized at instantiation to precisely monitor the logic signals within the host SoC that interest the engineering team, giving visibility of those internal signal lines that would otherwise be inaccessible once the SoC is delivered, as well as during FPGA prototyping or emulation.
All Tessent Embedded Analytics monitors (IPs), can be accessed via a dedicated, secure communication infrastructure. Non-intrusive debug and monitoring using an off-chip host or debugger is facilitated through USB 2, USB 3, JTAG, or Aurora interfaces. Embedded software can drive the system via an AXI interface to create a self-contained on-chip monitoring system.
Key features
- Analyzes on-chip signals and interfaces.
- Measure the performance and verify the functionality
- “Logic-analyzer” type visibility of internal signals not normally detectible off-chip
- Run-time configurable
- Use to interact with other Tessent Embedded Analytic modules for complex triggering scenarios
Block Diagram
Tessent Status Monitor block diagram
Benefits
- Accelerate SoC debug and SW development
- Identify and resolve hard-to-identify bugs significantly faster compared to traditional software-only solutions
- Root-cause performance degradations and memory corruption
- Better visibility and analytics
- Integrated part of the Tessent Embedded Analytics whole system solution
What’s Included?
- Parameterized soft core (Verilog RTL)
- Available UVM verification IP
- Optional Tessent SystemInsight IDE software
- Optional Tessent Embedded SDK software development kit
Specifications
Identity
Part Number
Tessent Status Monitor
Vendor
Siemens Tessent Embedded Analytics
Type
Silicon IP
Files
Note: some files may require an NDA depending on provider policy.
Provider
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Frequently asked questions about system monitoring IP cores
What is Tessent Status Monitor?
Tessent Status Monitor is a Monitoring IP core from Siemens Tessent Embedded Analytics listed on Semi IP Hub.
How should engineers evaluate this Monitoring?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Monitoring IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.