LVDS IP Listing

The LVDS Verification IP provides an effective & efficient way to verify the LPC components of an IP or SoC.

• Single-Protocol PHY

This IP is a high-speed LVDS (Low-Voltage Differential Signaling) transceiver supporting multi-channel joint.

• Single-Protocol PHY

LVDS-based IOs The Bi-directional LVDS is in production from 90nm CMOS to 16/12nm FinFET and taped out in 7nm FinFET.

• TSMC
• 40nm
• LP
• Silicon Proven

IP

• High-Speed

Certus provides full LVDS RX & TX IOs in GlobalFoundries and other foundry technologies.

• TSMC
• 65nm
• GP
• Silicon Proven

The SmartDV's LVDS verifies the Radio Front end-Baseband digital parallel interface.LVDS Verification IP can be used to verify BB…

• Single-Protocol PHY

LVDS Synthesizable Transactor provides a smart way to verify the LVDS component of a SOC or a ASIC in Emulator or FPGA platform.

• Single-Protocol PHY

Our LVDS (Low Voltage Differential Signaling) and OpenLDI (Open Low-voltage Differential Signaling Interface) PHY which is compos…

• Single-Protocol PHY

The LVDS Receiver IP is designed to support Single Link transmission between Host and Flat Panel Display with up to SXGA+ resolut…

• Single-Protocol PHY
• Pre-Silicon

The LVDS transmitter is designed to support Single Link transmission between Host and Flat Panel Display with up to SXGA+ resolut…

• Single-Protocol PHY
• Pre-Silicon

This IP is a total solution for LVDS applications, including LVDS transmitter I/O, receiver I/O, common block and power/ground I/…

• TSMC
• 22nm
• ULL
• Available on request

This IP is a total solution for LVDS applications, including LVDS transmitter I/O, receiver I/O, common block and power/ground I/…

• High-Speed
• Available on request
• TIA/EIA-644-A LVDS standard

This IP is a total solution for LVDS applications, including LVDS transmitter I/O, receiver I/O, common block and power/ground I/…

• HHGrace
• 55nm
• lp
• Available on request

This IP is a total solution for LVDS applications, including LVDS transmitter I/O, receiver I/O, common block and power/ground I/…

• SMIC
• 130nm
• G
• Available on request

A physical layer IP for LVDS Receiver.

• Single-Protocol PHY
• In Production
• Immediate
• IEEE 1596.3 Standard

The SONY_CAM_IF IP Core provides a simple way to connect the Sony® FCB-EV range of cameras to your FPGA.

• Single-Protocol PHY

The LVDS_SERDES IP Core is a high-speed LVDS transmitter / receiver pair suitable for a wide range of serial interface applicatio…

• Single-Protocol PHY

The CL12491M8TIP160 transmitter converts parallel RGB data and 4bits of HYNC,VSYNC,DE and Control) of CMOS parallel data into ser…

• TSMC
• 16nm
• FFC
• Silicon Proven

The Video LVDS SerDes Transmitter / Receiver IP Core provides a , easy-to-use Serializer/Deserializer (SerDes) solution to interf…

• Single-Protocol PHY
• Available for immediate sale

A SkyWater I/O Library combining standard GPIO, I2C-compatible ODIO, analog I/O, and integrated LVDS for robust mixed-signal and …

• SkyWater
• 90nm
• S90