Vendor: InPsy Category: Single-Protocol PHY

LVDS and OpenLDI PHY

Our LVDS (Low Voltage Differential Signaling) and OpenLDI (Open Low-voltage Differential Signaling Interface) PHY which is compos…

Overview

Our LVDS (Low Voltage Differential Signaling) and OpenLDI (Open Low-voltage Differential Signaling Interface) PHY which is composed of two 4-lane LVDS PHY, is a high-speed digital interface designed to facilitate the transmission of video and audio signals between various components within electronic devices. Optimized for applications in flat-panel displays, industrial equipment, automotive infotainment systems, and medical devices, the LVDS and OpenLDI PHY ensure reliable, high-quality performance while maintaining low power consumption.

Key features

  • Silicon proven with maximum speed @1.5Gbps per lane
  • Suitable for Automotive applications with ESD levels: HBM > 4KV and CDM > 750V
  • LVDS TX PHY: 4-data lanes plus 1-clock lane with each lane can be individually turned off
  • Supports long-distance transmission: Capable of maintaining signal integrity over longer cable length
  • OpenLDI PHY: Silicon proven 8-lane OpenLDI PHY
  • PLL supports SSC with 30~100K ± 3.1% range

Block Diagram

LVDS and OpenLDI PHY block diagram

Specifications

Identity

Part Number
LVDS and OpenLDI PHY
Vendor
InPsy
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

InPsy
HQ: Taiwan (R.O.C.)

Learn more about Single-Protocol PHY IP core

InPsytech showcases 3nm UCIe 3.0 technology at OCP 2025, Accelerating Innovation in Chiplet Ecosystem

InPsytech has long focused on high-speed and low-power interface IP technologies. Its UCIe (Universal Chiplet Interconnect Express) portfolio supports advanced process nodes from 22nm down to 2nm, optimized for 3nm production. The IP achieves data transfer rates up to 64 GT/s, while supporting 2.5D and 3D packaging architectures to enable high-efficiency chip-to-chip interconnects and heterogeneous integration.

Frequently asked questions about Single-Protocol PHY IP

What is LVDS and OpenLDI PHY?

LVDS and OpenLDI PHY is a Single-Protocol PHY IP core from InPsy listed on Semi IP Hub.

How should engineers evaluate this Single-Protocol PHY?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Single-Protocol PHY IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP