VeriSilicon CHRT 0.13um 1.2V/2.5V DUPIO_01 Library
VeriSilicon CHRT 0.13um 1.2V/2.5V DUP I/O Cell Library developed by VeriSilicon is optimized for Chartered Semiconductor Manufact…
- Analog
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
VeriSilicon CHRT 0.13um 1.2V/2.5V DUPIO_01 Library
VeriSilicon CHRT 0.13um 1.2V/2.5V DUP I/O Cell Library developed by VeriSilicon is optimized for Chartered Semiconductor Manufact…
UMC 0.18um 1.8v 60MHz Ring Oscillator
The present IP is a Ring Oscillator which is controlled by the external 1.2v bandgap reference.
The 3GPP LTE Channel Encoder performs the 'outer' transmit functions for the Physical Downlink Shared (PDSCH), Multicast (PMCH), …
The 3GPP LTE Channel Decoder provides a high-performance, optimized decode function for the Uplink Shared Channel (UL-SCH), as de…
IEEE 802.15.3c Irregular LDPC(672,336), LDPC(672,504), LDPC(672,588) encoder and decoder
IEEE802.15.3c irregular LDPC(672,336), LDPC(672,504), LDPC(672,588) encoder and decoder.
China Multimedia Mobile Broadcasting (CMMB) LDPC decoder, implemented with Continuous bits’ LDPC-decoder architecture.
Nios II Soft IP Processor for Safety Critical Applications
NIOSII_SC soft IP Processor is the safety critical version of the of the Nios II processor targeting airborne electronic applicat…
Configurable Multi-channel Serial Audio Transmitter
The TDM-Tx-Pro (CWda19) is part of the AudioWorks family of proven audio interface cores featuring a configurable multi-channel a…
The LDS SATA HOST XV5 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Virtex 5 FPGA.
Power-on reset circuit for 1.8V and 3.3V - TowerJazz 0.18um
Power-on reset circuit monitoring both 1.8V and 3.3V supplies and with extended reset duration.
DC motor controller - UMC 3.5um HV
Fully integrated DC motor controller ASIC featuring current limiter and thermal protection
Virtex-5 FPGA, Gen1 PCI Express The Xilinx Endpoint solution for Gen PCI Express® includes a PCI Express 1-lane, 4-lane, and 8-la…
Spartan-3 LogiCORE Endpoint PIPE for PCI Express (PCIe)
Version 1.8 Now Supports Spartan™-3/3E/3A The Xilinx Spartan-3 LogiCORE™ Endpoint PIPE for PCI Express® (PCIe®) protocol layer co…
SPI-4 Phase 2 Interface Solutions
The Xilinx SPI-4 Phase 2 core provides a fully compliant Packet-Over-SONET/SDH (POS) solution, which can be quickly integrated in…
Cascaded Integrator Comb (CIC) Compiler
The Cascaded Integrator Comb (CIC) Filter, or Hogenauerfilter, is a multiplier less filter architecture that is extremely importa…
Included with CAN IP Solutions.
XPS Serial Peripheral Interface
The XPS Serial Peripheral Interface (SPI) connects to the PLB (Processor Local Bus) and provides a serial interface to SPI device…
YCrCb to RGB Color-Space Converter
The Xilinx YCrCb to RGB Color Space Conversion LogiCORE™ is an optimized hardware block for converting YCrCb video data to the RG…
RGB to YCrCb Color-Space Converter
The Xilinx RGB to YCrCb Color Space Conversion LogiCORE™ is an optimized hardware block for converting RGB video data to the YCrC…
Reduced Media Independent Interface (RMII)
The MII to RMII LogiCORE is a "shim" core which converts a traditional 16-pin Media Independent Interface (MII) on a Xilinx 10/10…