Overview
Virtex-5 FPGA, Gen1 PCI Express
The Xilinx Endpoint solution for Gen PCI Express® includes a PCI Express 1-lane, 4-lane, and 8-lane complete endpoint core and a PCI Express PIPE Interface Protocol Layer core. In addition a PCI Express Endpoint Development Kit is also available. These solutions can be used in communication, multimedia, server and mobile platforms and enables applications such as high-end medical imaging, graphics intensive video games, DVD quality streaming video on the desktop and 10 Gigabit Ethernet interface cards. This core combined with other Xilinx connectivity solutions help customers preserve their investment in older technologies by allowing seamless bridging to other standard and proprietary interfaces.
Learn more about PCI Express IP core
Currently dominating the desktop PC motherboard and graphics markets, the PCI Express protocol is poised to supplant PCI and PCI-X interface as the dominant high-bandwidth interconnect for the server, enterprise, mobile, workstation, networking, communica
Increasingly, FPGA designs are no longer just the 'glue logic' of the past; they are becoming more complex every year, often incorporating challenging such as PCI Express cores. Time spent trying to maintain timing in these modules is not only frustrating, but often unproductive as well. The design preservation flow solves this issue by allowing the customer to meet timing on the critical module(s) of the design and then reuse the implementation results in future iterations.
Geeta Arora, Cadence
Madhumita Sanyal, Synopsys