8-bit Baseline JPEG Encoder with Optional Video Rate Control
The JPEG-E core is a standalone and high-performance 8-bit Baseline JPEG encoder for still image and video compression applicatio…
- Image Conversion
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
8-bit Baseline JPEG Encoder with Optional Video Rate Control
The JPEG-E core is a standalone and high-performance 8-bit Baseline JPEG encoder for still image and video compression applicatio…
GRCAN is a CAN 2.0 IP core that implements an internal CAN controller and an AHB DMA backend.
AKW1 implements the NIST standard AES key wrap and unwrap.
Ultra-Compact Data Encryption Standard (DES/3DES) Core
The DES1 ASIC/FPGA core is an implementation of the DES and triple DES encryption and decryption in compliance with the NIST Data…
Since its introduction in the mid-1980s, the Controller Area Network (CAN) has become a standard network protocol for automotive …
Multi-channel HDTV H.264/AVC Encoder
The OL_H264e core is a hardware implementation of the H.264 video compression algorithm.
The CMS0024 Multi-channel Cable Modulator encodes up to four separate transport streams for J83 or DVB-C.
The CMS0008 Viterbi Decoder core implements Viterbi’s algorithm for maximum likelihood decoding of non-feedback convolutional cod…
AES-GCM MACsec (IEEE 802.1AE) and FC-SP Cores
Implementation of the new LAN security standard 802.1ae (MACSec) requires the NIST standard AES cipher in the GCM mode for encryp…
The AES-IP-36 (EIP-36) is IP for accelerating the AES symmetric cipher algorithm (FIPS-197), supporting ECB, CBC and CTR modes up…
HDTV H.264/AVC Baseline Video Encoder
The OL_H264e core is a hardware implementation of the H.264 baseline video compression algorithm.
ARC4 Stream Cipher Accelerators
The ARC4-IP-44 (EIP-44) is IP for accelerating the ARC4 stream cipher algorithm (used for legacy SSL & IPsec) up to 5 Gbps @ 600M…
The JPEG2K-E core is a still image and video encoder that implements Part 1 of the JPEG 2000 standard.
The JPEG-D core is a standalone and high-performance 8-bit Baseline JPEG decoder for still image and video compression applicatio…
Serial ATA (SATA) PHY Transceiver IP
SMS6000 is a fully integrated CMOS transceiver that handles the low level Serial ATA protocol and signaling.
Protocol controller IP for CAN / CAN FD
The M_CAN module is the new CAN Communication Controller IP-module that can be integrated as stand-alone device or as part of an …
Ultra low power C-programmable DSP core
NXP conducts a successful licensing program for this embedded DSP core for ultra low power applications.
PCI Express PIPE PHY Transceiver
SMS5000 is a fully integrated CMOS transceiver that handles the full Physical Layer PCI Express protocol and signaling.
Dolby Digital/AC-3/MPEG Audio Decoding Core
The J1 is a core cell design of an application specific signal processor which performs both Dolby Digital/AC-3 and MPEG audio de…
100 dB of SNR, 24-bit stereo audio CODEC with headphone driver and digital mixer
Amidst a rich a-la-carte offering, shCODlp-100.02 is an optimized and configuration around high performance DAC and ADC cores whi…