CAN 2.0 Controller with DMA
GRCAN is a CAN 2.0 IP core that implements an internal CAN controller and an AHB DMA backend.
Overview
GRCAN is a CAN 2.0 IP core that implements an internal CAN controller and an AHB DMA backend. The APB bus is used for configuration, control and status handling and the AHB bus is used for retrieving and storing CAN messages via the DMA engine.
GRCAN supports transmission and reception of sets of messages by use of circular buffers located in memory external to the core. Separate transmit and receive buffers are assumed. Reception and transmission of sets of messages can be ongoing simultaneously.
Key features
- 20-1000 kbps bitrate
- CAN 2.0B with standard and extended frame format
- Message filtering
- DMA using circular buffers of configurable size
- Single shot transmission
Block Diagram
What’s Included?
Specifications
Identity
Files
Note: some files may require an NDA depending on provider policy.
Provider
Learn more about CAN / CAN-FD / CAN-XL IP core
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Frequently asked questions about CAN / CAN FD / CAN XL IP cores
What is CAN 2.0 Controller with DMA?
CAN 2.0 Controller with DMA is a CAN / CAN-FD / CAN-XL IP core from Frontgrade Gaisler listed on Semi IP Hub.
How should engineers evaluate this CAN / CAN-FD / CAN-XL?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this CAN / CAN-FD / CAN-XL IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.