High Speed CCSDS Turbo Decoder with Optional Viterbi Decoder
This is a CCSDS compatible 16 state error control turbo decoder.
- Channel Coding
- Now
- CCSDS 131.0-B-3 Blue Book S…
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
High Speed CCSDS Turbo Decoder with Optional Viterbi Decoder
This is a CCSDS compatible 16 state error control turbo decoder.
This VME64 slave controller is designed for custom integration using standard FPGA and ASIC technologies.
The CMS0009 DVB-T/DVB-H Modulator provides all the necessary processing steps to modulate a single (or pair of hierarchical) tran…
IEEE 802.16 WirelessMAN OFDM Channel Codec
The CMS0005 802.16 Channel Codec provides all of the functionality necessary to implement the back end data processing in an 802.…
The USB 1.1 Hub core is designed for flexibility and ease of use and is technology independent.
High Speed Inmarsat Compatible Turbo Decoder
This is an Inmarsat compatible 16 state error control turbo decoder.
Rapid IO - Physical Layer Interface Core
The RapidIO™ is a packet - switched interconnect intended primarily as an intra - system interfaces for a chip-to-chip and board-…
The CMS0002 Viterbi Decoder core implements Viterbi’s algorithm for maximum likelihood decoding of non-feedback convolutional cod…
The CMS0010 DVB-S/-DSNG Modulator with integrated Reed-Solomon encoder has been designed specifically to address the requirements…
The Helion Fast Hash core family implements the NIST approved SHA-1, SHA-256, SHA-384 and SHA-512 secure hash algorithms to FIPS …
7990 Local Area Network Controller
The SI79C90 Local Area Network Controller for Ethernet is an IP core designed to greatly simplify interfacing a microcomputer or …
The Lempel-Ziv (LZ) compression methods are among the most popular algorithms for lossless data compression.
The USB2.0 function controller is a integrated USB solution for USB applications.
IEEE 1394a - 2000 Link Layer Controller
The Link core is a functional block available for insertion into a customer's ASIC design, which supports the IEEE 1394a - 2000 D…
The USB 2.0 Hub core is designed for flexibility and ease of use and is technology independent.
USB 2.0 Host Controller (EHCI)
The USB 2.0 Host controller is designed for flexibility and ease of use and facilitates implementation of a wide variety of appli…
v5.3 Dual Mode Software Stack and Profiles for Classic Bluetooth and Bluetooth low energy
LTIMindtree’s EtherMind Bluetooth 5.3 is a dual mode Bluetooth software IP consisting of protocol stack, standard Bluetooth profi…
SMTPE-292 Scrambler & Descrambler / Framer
The SMPTE292 core set, coupled with the AMCC S8401/S8501 serializer/deserializer chipset is fully compliant to the SMPTE 292M spe…
Integrates MAC IP to a broad range of PHY and SerDes IP
The Helion Tiny Hash Core family for ASIC offers a combination of high functionality and low resource usage for lower data rate a…