The DVB-T2 core allows the transmission of an MPEG-TS data stream to a digital to analog converter in base band, IF or RF mode.
- Modulation Demodulation
- April 2015
- EN 302 755 V1.1.1
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
The DVB-T2 core allows the transmission of an MPEG-TS data stream to a digital to analog converter in base band, IF or RF mode.
An n-bit hash is a map from arbitrary length messages to n-bit hash values.
The AES core is a drop-in module that includes the following functions: • 128/192/256-bits key size • Automatic Roundkey calculat…
The MVD MPEG TS Deserializer core is a drop-in module that includes the following functions: • Data acquisition on clock • Serial…
The MVD MPEG TS Serializer core is a drop-in module that includes the following functions: • Incoming MPEG_TS clock resynchroniza…
MPEG-TS closed caption inserter
The MPEG-TS closed caption inserter core is a drop-in module for insertion of DTV-708 closed caption into payload of MPEG video e…
The MVD RX MPEG-TS Interface is a drop-in module that includes the following functions: • 188, 204 or 208 bytes MPEG-TS input • D…
The MVD MPTS Demultiplexer core is a drop-in module that includes the following functions: • Receives an MPTS input stream and de…
The MVD ATSC Remultiplexer core analyses the MPEG TS stream inputs and gives access to the followings information and statistics …
The MVD RTP Receiver allows the reception and the processing of an RTP stream.
This RTP Transmitter IP core implements a full Hardware RTP Transmitter.
DVB-T/H Modulator - RF output with AD9789 DAC
The MVD DVB-T/H modulator is a drop-in module for FPGA that includes the following functions : • Input data framer from Microproc…
Super-Fast, Configurable 16-bit 80251 Microcontroller Core
The S80251XC3 core implements a high-performance 16-bit microcontroller that executes the MCS®251 & MCS®51 instruction sets and i…
Hyperbus Flash Memory Controller
Emerging high-performance applications demand increasingly fast read throughputs from NOR-flash memory devices.
High-availability Seamless Redundancy and Parallel Redundancy Protocol (HSR and PRP, IEC 62439-3 Clause 5 and 4 respectively) Edition 4.0 protocols
Multiplexing transceiver with 4 CSI2 inputs and a single CSI2 output
This IP multiplexes inputs from up to 4 CSI2 cameras, each with up to 4 data lanes, to a single CSI2 output stream, with up to 4 …
LNA is consists of two bipolar amplifier stages.
2-bit 1-channel 50 MHz flash ADC
The circuit is 2-bit ADC with programmable threshold.
Small, ultra-low-power, and very processing-efficient 32-bit processor
The Beyond BA20 PipelineZero Embedded Processor implements a small, ultra-low-power, and very processing-efficient 32-bit process…
SPI Controller IP- Master-only, Parameterized FIFO, AMBA APB / AHB / AXI Bus
The DB-SPI-M-AMBA is a Serial Peripheral Interface (SPI) Controller Verilog IP Core supporting only Master SPI Bus transfers (bot…