Vendor: MVD Cores Category: Video Processing

MPEG-TS closed caption inserter

The MPEG-TS closed caption inserter core is a drop-in module for insertion of DTV-708 closed caption into payload of MPEG video e…

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Overview

The MPEG-TS closed caption inserter core is a drop-in module for insertion of DTV-708 closed caption into payload of MPEG video elementary stream.

The MPEG-TS Closed caption inserter core interprets SMPTE-334 Caption data packet and insert the caption into the payload of the Video elementary stream.

Moreover, The MPEG-TS Closed caption inserter core can insert ATSC PSIP tables with dedicated Caption service descriptor and others "on demand" descriptors.

The output rate of the stream is slightly increased to allow caption insertion and PSIP generation. PCR restamping is done to make the output consistent.

A 8-bit CPU interface is available for core control. By default the core can start up without CPU initialization.

Key features

  • Supported FPGA families:Xilinx Spartan-6, Virtex-6, Artix-7, Kintex-7, Virtex-7, Zynq
  • 1 SPI input / 1 SPI output
  • Compliant with DVB and ATSC standard
  • Insertion of DTV-708 closed caption into payload of MPEG video elementary stream
  • CPU configuration and monitoring interface
  • Full PCR re-stamping
  • Full synthesizable RTL design (not delivered) for easy customization
  • Netlist version available for ISE 14.1 and later versions

Block Diagram

MVD_CC_INSERTER block diagram

Applications

  • The MPEG-TS closed caption inserter core can be used in addition to an MPEG encoder module to add specifics functionalities and make it consistent in regards of PSIP ATSC standard.

What’s Included?

  • Datasheet
  • Netlist for core generation
  • VHDL top file
  • VHDL source code : can be delivered as an option under NDA and other specific clauses

Specifications

Identity

Part Number
MVD_CC_INSERTER
Vendor
MVD Cores
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

MVD Cores
HQ: France
Contact MVD Cores

Learn more about Video Processing IP core

Picking the right MPSoC-based video architecture: Part 1

A look at the design of multiprocessor systems-on-chips (MPSoCs) for video applications and how to optimize them for computational power and real-time performance as well as flexibility. Part 1: Architectural approaches to video processing

Analysis: ARC's Configurable Video Subsystems

Adding to its growing portfolio of licensable silicon IP subsystems, ARC has announced five configurable video processing subsystems. The subsystems range from the smallest-size AV 402V to the highest-performance AV 417V, and support multi-standard video encoding and decoding at resolutions ranging from CIF to D1.

Frequently asked questions about Video Processing IP

What is MPEG-TS closed caption inserter?

MPEG-TS closed caption inserter is a Video Processing IP core from MVD Cores listed on Semi IP Hub.

How should engineers evaluate this Video Processing?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Video Processing IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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