Universal Flash Storage (UFS) is a JEDEC standard for high performance mobile storage devices suitable for next generation data s…
- UFS Controller
Universal Flash Storage (UFS) is a JEDEC standard for high performance mobile storage devices suitable for next generation data s…
The Superspeed Inter-chip Controller (USB 3.0 SSIC Adapter) uses the MIPI-M-PHY (Type-1) v.
USB 3.0 Device Upgrade IP Core
The USB 3.0 Device Upgrade IP enables designers in the PC, mobile, consumer and communication markets to bring significant power …
The USB 3.0 Device IP core enables designers in the PC, mobile, consumer and communication markets to bring significant power and…
The USB 2.0 PHY IP core is a transceiver compliant with the USB 2.0 Transceiver Macrocell Interface Plus (UTMI+) level 3 specific…
The USB 2.0 OTG IP Core is compliant with the OTG Supplement Rev.
The USB 2.0 Hub IP core is a USB 2.0 specification compliant hub core that supports 480 Mbit/s in High Speed (HS) mode, 12 Mbit/s…
The USB 2.0 Host IP is a USB 2.0 specification compliant host IP core with an optional AHB, PCI, or custom host interface.
The USB 2.0 Device IP core is Arasan’s latest development that enables designers in the PC, mobile, consumer and communication ma…
High Speed Inter-CHIP USB 2.0 PHY
USB is the ubiquitous peripherals interconnect of choice for a large number of computing and consumer applications.
The UFS 2.1 Host Stack is a stack developed for UFS Host Controllers that are used to connect to UFS devices via UniPro/M-PHY.
UFS Hardware Validation Platform (HVP)
Universal Flash Storage (UFS) is a simple, high performance, mass storage device with a serial line interface.
The Universal Flash Storage (UFS) is a JEDEC data transfer standard is designed for mobile systems.
The Universal Flash Storage (UFS) is a JEDEC data transfer standard is designed for mobile systems.
The Universal Flash Storage 3.0 (UFS 3.0) is a simple but high-performance, serial interface primarily used in mobile systems, be…
SD Card / SDIO Card Combo Device IP
SD / SDIO Card Combo Device IP core is SD memory controller and a SDIO controller with an AHB interface.
The SDIO Card Device IP core is used to implement SDIO cards that are connected to a Host processor over a standard SD bus.
SD 3.0 / eMMC 4.51 Hardware Validation Platform
SD and MMC memory card interfaces dominate the mobile storage markets such as tablets, smartphones, video camcorders, and many ot…
The SD Card Host IP is a integrated host controller IP solution that supports three key memory card I/O technologies: SD 3.0 SDIO…
The eMMC Host controller IP is a integrated host controller IP solution that supports three key memory card I/O technologies: eMM…