Mobile Industry Processor Interface (MIPI) D-PHY is supported on Agilex™ 5 and Agilex™ 3 FPGAs allowing transmission and receptio…
- MIPI D-PHY
Mobile Industry Processor Interface (MIPI) D-PHY is supported on Agilex™ 5 and Agilex™ 3 FPGAs allowing transmission and receptio…
LVDS Tunneling Protocol and Interface (LTPI) IP
LVDS Tunneling Protocol and Interface (LTPI) is a soft IP introduced in the DC-SCM 2.0 Specification to facilitate the tunneling …
GTS is a general purpose transceiver in Agilex™ 5 and Agilex™ 3 FPGAs.
The 10GBASE-R PHY Intel® FPGA Intellectual Property (IP) core allows connectivity directly with any XFP or SFP+ optical module or…
As a part of the Video and Vision Processing (VVP) Suite Intel® FPGA IP, the 3D look-up table (LUT) Intel® FPGA IP provides an ef…
DDR and DDR2 SDRAM Controller with ALTMEMPHY Intel® FPGA IP
The DDR and DDR2 SDRAM Controller with ALTMEMPHY Intel FPGA Intellectual Property (IP) provides simplified interfaces to industry…
High-Performance Memory Controller II SDRAM Intel® FPGA IP Core
The High-Performance Memory Controller II SDRAM Intel FPGA IP core handles the complex aspects of using DDR, DDR2, and DDR3 SDRAM…
The Triple-Speed Ethernet FPGA IP core consists of a 10/100/1000 Mbps Ethernet media access control (MAC) and physical coding sub…
Symmetric Cryptographic Intel® FPGA IP
The Symmetric Cryptographic Intel® FPGA IP is a hard IP core implementing AES and SM4 encryption and decryption.
Intel® Stratix® 10 FPGA H-Tile FPGA production devices include a configurable, hardened protocol stack for Ethernet that is compa…
Serial Lite III Streaming Intel® FPGA IP
The Serial Lite III Streaming Intel® FPGA Intellectual Property (IP) core offers simple connectivity that enables rapid point-to-…
Serial Lite II Intel® FPGA IP Core
The Serial Lite II Intel® FPGA IP core provides a simple and lightweight way to move data from one point to another reliably at h…
The serial digital interface (SDI) II Intel FPGA intellectual property (IP) core implements a transmitter, receiver or full-duple…
Intel is discontinuing the intellectual property (IP) for RapidIO I and RapidIO II Intel offers two distinct Intel® FPGA IPs for …
Intel® Precision Time Protocol Servo (Intel® PTP Servo) FPGA IP
Coordinate the actions of disparate electronic systems that must be synchronized in time with Intel® PTP Servo, which employs har…
Scalable Switch Intel® FPGA IP for PCI Express
The Scalable Switch Intel® FPGA IP for PCI Express is a fully configurable switch that implements one fully configurable upstream…
Agilex™ 5 FPGAs and SoC FPGAs are monolithic designs with integrated high-speed transceivers (GTS) and hardened PCIe controller I…
The F-Tile Intel® Hard IP supports PCIe* configurations up to 4.0 x16 in Endpoint (EP), Root Port (RP), and Transaction Layer (TL…
Intel® Arria® 10 and Intel® Cyclone® 10 PCIe Hard IP
Intel® Arria® 10 and Intel® Cyclone® 10 GX FPGAs include a configurable, hardened protocol stack for PCI Express* that is complia…
The Extensible Radio Access Network (O-RAN WG4 Fronthaul Interface) defines a fronthaul interface between a lower-layer split dis…