Peripheral Direct Memory Access Controller
The CC-PDMA-APB-AHB is a synthesisable Verilog model of a peripheral direct memory access controller.
- DMA
- Now
- AHB-Lite, APB
System peripheral IP cores are essential building blocks in modern SoC and ASIC designs, providing control, management, and support functions for the overall system operation.
This category includes a wide range of peripheral functions such as DMA controllers, interrupt controllers, monitoring and health management blocks, power management controllers, storage-related controllers, system controllers, and timers & watchdogs. These IP cores help coordinate data movement, system supervision, power optimization, fault detection, and overall platform management.
This catalog allows you to explore and compare system peripheral IP cores from leading vendors based on functionality, performance, power consumption, and process node compatibility.
Whether you are designing embedded systems, automotive platforms, or industrial controllers, you can find the right peripheral IP to support your system architecture.
Peripheral Direct Memory Access Controller
The CC-PDMA-APB-AHB is a synthesisable Verilog model of a peripheral direct memory access controller.
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Emulation of RF and channel impairments in Verilog
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DO-254 AXI Timebase Watchdog Timer 1.00a
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A 32-bit timer module that attaches to the AXI4-Lite interface, can be cascaded to 64-bit.
DO-254 Processor System Reset Module 1.00a
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DO-254 AXI Interrupt Controller 1.00a
Concentrates multiple interrupt inputs from peripheral devices to a single interrupt output to the system processor.
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Controller IP for SD and eMMC interfaces including managed NAND devices
Wrapper IP building blocks for ES1 IP
IP
Direct Memory Access Controller
The DDMA is a four-channel Direct Memory Access Controller.