1.2V/3.3V GPIO Library with 3.3V I2C ODIO in TSMC 110nm
A TSMC 110nm Wirebond and Flipchip compatible I/O library with 1.2V/3.3V Fail-Safe GPIO, 3.3V I2C Open-Drain I/O, SPI and associa…
MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes - TSMC 12FFCP 1.8V, North/South Poly Orientation
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
LPDDR5X/5/4X PHY - TSMC N5A for Automotive, ASIL B Random, AEC-Q100 Grade 2
The LPDDR5X/5/4X PHY is a physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and system-inpackag…
[TECHNOLOGY] TSMC 12nFFC Available metallization technologies : 1p11M_2Xa1Xd3Xe2My2Mr
MIPI MPHY Type 1 G5 2TX2RX TSMC N3E 1.2V, North/South Poly Orientation
The silicon-proven MIPI® M-PHY IP, compliant with the latest MIPI M-PHY v5.0 specification, supports speeds up to 23.32 Gbps per …
UCIe-S PHY for Standard Package (x16) in TSMC N3E, North/South Orientation
The UCIe PHY IP enables high-bandwidth, low-power, and low-latency die-to-die connectivity in a multi-die package for hyperscale …
Up to 105 dB of SNR, 24-bit stereo CODEC with PDM to PWM transmodulator DAC and embedded regulator
The sCODa-MT1-LR.06 is an audio CODEC which provides the insurance of the best sound quality after integration into a SoC for Set…
224G Ethernet PHY, TSMC N3E x4, North/South (vertical) poly orientation
The 224G Ethernet PHY IP, an integral part of the high-speed SerDes IP portfolio, meets the growing high bandwidth and low latenc…
The RAR-eSR-qLR-ref-[1.62-3.63]-[0.55-2.5].04g embeds and controls two ViC regulators called eSR and qLR.
DC/DC buck converter in TSMC 40ULP supporting 1.8 to 5.5 V input voltage with low quiescent current and high efficiency at light …
DC/DC buck converter in TSMC 40ULP with low quiescent current and high efficiency at light load
DC/DC buck converter in TSMC 40ULP supporting 1.62 to 3.63 V input voltage with low quiescent current and high efficiency at ligh…
24-bit Cap-less ADC 106 dB SNR low power and PLL-less 3 channels
The sADC-uLP-SW1.01 is a mixed (analog and digital) Virtual Component containing six mono ADCs, and additional functions offering…
TSMC N4P SD/eMMC PHY North/South Poly Orientation
Synopsys SD/eMMC PHY provides an optimal balance for cost and performance for storage solutions.
TSMC N5 SD/eMMC PHY North/South Poly Orientation
Synopsys SD/eMMC PHY provides an optimal balance for cost and performance for storage solutions.
0.9V/1.2V I/O Library in TSMC 55nm
A 0.9V/1.2V I/O Library in TSMC 55LP.
The sCOD100-uLP-ANC-H1-LR-D.02 is a mixed (analog and digital) Virtual Component containing a stereo ADC, one mono DAC with headp…
JESD204B Tx-Rx PHY IP, Silicon Proven in TSMC 65GP/55GP
The JESD 204B controller IP is optimized and silicon agnostic implementation of the JEDEC JESD204B standard targeting any ASIC, F…
24-bit Cap-less ADC 101 dB SNR low power and low latency 4 channels
The mADC101-SW3-LR.01 is a mixed (analog and digital) Virtual Component containing four mono ADC, and additional functions offeri…
10bit SAR ADC for general voltage measurements
1MHz SAR ADC, 10-bit, for telemetry measurements
24-bit audio inductor-less class-D DAC with efficiency and ultra-low latency capability
The mDAC115-CDA1-D.01 is a mixed (analog and digital) Class-D Audio DAC dedicated to head-phone market featuring high efficiency …