optimized for generative AI applications running Transformer based NN models that enables efficient and simple system designs.
- DSP Core
Discover DSP and Math IP for digital signal processing, arithmetic acceleration, and compute-intensive algorithms in semiconductor designs. This category includes IP cores optimized for filtering, transforms, vector processing, fixed-point and floating-point computation, and real-time signal manipulation.
Compare DSP and Math IP by processing architecture, supported numeric formats, throughput, latency, programmability, power efficiency, and target application. These IP solutions are widely used in communications, audio, vision, radar, industrial control, AI preprocessing, and embedded compute platforms.
optimized for generative AI applications running Transformer based NN models that enables efficient and simple system designs.
4x improvement to vector computation with 4x sustained bandwidth of prior generations
Building on the popular SiFive Intelligence™ X280 products’ success in AI/ML applications across mobile, infrastructure and autom…
Optimized for machine learning, video and imaging workloads
Maintains a database of outstanding orders.
SEC 5nm LVH 6T Multi-Bits Latch
SEC 5nm LVH 6 track High Density Multi-Bits Latch
CCSDS AR4JA LDPC
PNU is a stand-alone Coprocessor capable of doing real-number computation on posit operands.
10-input testmux, with LU protection at output
10-input testmux, has LU protection at output, can be used at chip I/O
21-input testmux, with LU protection at output
21-input testmux, has LU protection at output, can be used at chip I/O
RF Counter, 8b, up to 10GHz, Idd=600uA
Asynchronous Sample Rate Converter (ASRC) 2 channels
The sASRC-SW1.01 is part of Dolphin digital audio IP & multi-channel ASRC family and can be used to interface various audio block…
Asynchronous Sample Rate Converter (ASRC) 8 channels
The octASRC-SW1.01 is part of Dolphin digital audio IP & multi-channel ASRC family and can be used to interface various audio blo…
Polar Encoder / Decoder for 5G NR control channels
AccelerComm's Polar IP delivers the 3GPP-compliant encoding and decoding chain for 5G NR control channels.
LDPC Encoder / Decoder for 5G and 6G NTN PHY
High-performance Forward Error Correction IP for 5G and 6G NTN PHY.
LTE Release-10 Baseband PHY. (L1) IP
This is a 3GPP Release 10 compliant LTE eNodeB PHY IP, which is a Macro cell LTE available for commercial deployment of LTE Netwo…
Narrow band - IoT Release-14 e-NodeB PHY. (L1) IP
This LTE UE Reference design is a Category NB UE.
Single precision, IEEE 754, integer to floating point conversion
The eSi-SP-FP-Int-to-Float IP core implements single-precision (32-bit), IEEE 754 compliant, integer to floating-point conversion.
Testmux 5bit - TSMC 180nm
Testmux 4bit - GlobalFoundries 130nm RFSOI
Testmux 4bit - GlobalFoundries 130nm RFSOI
Binary to Thermocoder, 5bit - GlobalFoundries 130nm RFSOI
Binary to Thermocoder, 5bit - GlobalFoundries 130nm RFSOI