The CMS0006 Universal QAM Demodulator is a 4th generation design that exploits Commsonic’s experience of QAM and OFDM systems for…
- Modulation Demodulation
- now
Discover DSP and Math IP for digital signal processing, arithmetic acceleration, and compute-intensive algorithms in semiconductor designs. This category includes IP cores optimized for filtering, transforms, vector processing, fixed-point and floating-point computation, and real-time signal manipulation.
Compare DSP and Math IP by processing architecture, supported numeric formats, throughput, latency, programmability, power efficiency, and target application. These IP solutions are widely used in communications, audio, vision, radar, industrial control, AI preprocessing, and embedded compute platforms.
The CMS0006 Universal QAM Demodulator is a 4th generation design that exploits Commsonic’s experience of QAM and OFDM systems for…
The CMS0004 Universal QAM/PSK Modulator is a flexible, high-performance, linear modulator core designed for a wide range of broad…
The FFT is factored into Radix-4 Butterfly operations.
Reed Solomon Codec (Errors-only)
The CMS0007 Reed Solomon Codec provides ultimate flexibility in its operation and build.
The J5 is a core cell design of an application specific signal processor which performs both Trusurround(TM) and SRS® 3-D audio v…
The CCSDS/ECSS Spacecraft Data Handling IP cores represent a collection of cores that have been developed specifically for the sp…
Low-density parity-check (LDPC) codes are linear error correction codes that allow you to transmit messages over noisy channels.
Revolutionary vector processor
From early Motorola and TI DSPs to modern smartphone DSPs in application processors, DSPs have been designed and optimized for in…
Crest Factor reduction block minimizes the likelihood that a transmission side Power Amplifier (PA) gets saturated while transmit…
As serial link speeds have increased, the reach achievable has become more and more limited by the lossy nature of the physical m…
Digital PID Controller Loop Algorithms for EMA
We have developed control system algorithm IP blocks to be able to control electromagnetic actuators.
BCH encoder and decoder for NAND FLASH
This IP is a BCH code encoder and decoder designed for storage application to address the reliability challenges.
The FH-OFDM modem is developed for OFDM applications used in frequency hopping transmission scenarios or fixed frequency scenario…
The NAVIC BCH decoder is developed for satellite navigation applications.
The NR-5G Polar encoder/decoder is developed for 5G new radio.
DVB-S2X Wideband LDPC/ BCH Encoder
The DVB-S2X Wideband LDPC BCH Encoder IP Core is developed for Digital Video Broadcasting applications.
Fixed Point Doppler Channel IP core
The Doppler Channel IP is a Doppler shift frequency (DSF) generator capable of introduce a shift frequency to samples as a phase …
(2048,1723) LDPC decoder for IEEE 802.3an 10GBASE-T
The LDPC IP is a specialized encoder and decoder for Low-density parity-check codes, specifically designed for the 802.3an standa…
Ultra High Speed FFT/IFFT processor
Noesis Technologies ntFFT_UHS IP implements a customized FFT/IFFT programmable fixed point (Decimation in Frequency - DIF) transf…
The 5G LDPC Encoder IP Core provides a perfect solution for this new LDPC structure with a high level of flexibility while mainta…