MIPS P8700 RISC-V Cores Target Automotive Applications
The rise of RISC-V has been rapid but adoption within safety and security critical spaces requires implementations that can meet requirements like ISO 26262 and ASIL-B/D. In this video, Sameer Wasson, CEO at MIPS, talks about their “very MIPSy core,” the P8700 RISC-V core.
Related Semiconductor IP
- Data Movement Engine - Best in class multi-core high-performance AI-enabled RISC-V Automotive CPU for ADAS, AVs and SDVs
- 64-bit, RISC-V, ultra-high performance processors
- 64-bit, RISC-V, performance and data computation processors
- 32-bit, RISC-V, deeply embedded processors
- RISC-V Display Connectivity Subsystem (DCS)
Related Videos
- Cortus ULYSS1 automotive MCU RISC-V video demonstration
- Secure RISC-V Processor for Root of Trust
- LLM Inference on RISC-V Embedded CPUs
- RISC-V at NVIDIA: One Architecture, Dozens of Applications, Billions of Processors
Latest Videos
- Software to silicon with RISC-V for Physical AI
- Breaking the Memory Wall: How New Memory Architectures are Reshaping AI Inference
- Functional Safety & Security Aspects of CAN XL
- Powering the AI Supercycle: Design for AI and AI for Design - Anirudh Devgan
- Scaling AI from Edge to Data Center with SiFive RISC-V Vectors