Architecture Exploration of SoC with Arm IP using VisualSim Architect
Learn to explore semiconductor architectures with VisualSim Architect—the exclusive public provider of architecture models for ARM v8/v9 processors and other ARM IPs including Corelink-Cyprus, AMBA AXI/CHI, GPU, DMA, DSU, and additional critical IP blocks. This webinar is designed for engineers and architects aiming to master advanced performance and power analysis techniques for both monolithic and chiplet-based SoCs, with a special emphasis on supporting ARM CHI and C2C interconnects.
What to Expect:
- In-Depth Modeling Techniques: Explore detailed architecture models for ARM v8/v9 processors and IP blocks such as Corelink-Cyprus, AMBA, GPUs, and more.
- Performance Debugging: Learn to measure latency, throughput, hit-ratio, and coherence behavior.
- Power Optimization: Discover strategies to reduce peak power consumption and resolve performance issues.
- Interactive Q&A Session: Get your technical questions answered by industry experts.
Related Semiconductor IP
- MIL-STD-1553 Controller IP
- UFS 5.x Device IP
- UCIe 3.x Controller IP
- Ethernet 800G PCS IP
- CHI to UCIe Bridge IP
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