Leveraging Virtual Platforms for Embedded Software Validation: Part 2
By Andy Ladd, Carbon Design Systems
Embedded.com (06/25/08, 04:16:00 PM EDT)
Earlier in Part 1, we described the benefits of leveraging virtual platforms to validate architecture, performance and embedded software. In this second part, a case study is provided as a means to illustrate the concepts and benefits of using a well-modeled virtual platform of a simple system-on-chip (SoC) design.
The article will discuss how to effectively use interface and abstraction techniques, modeling tools, debugging techniques, and profiling to characterize and validate architectures and embedded software.
Embedded.com (06/25/08, 04:16:00 PM EDT)
Earlier in Part 1, we described the benefits of leveraging virtual platforms to validate architecture, performance and embedded software. In this second part, a case study is provided as a means to illustrate the concepts and benefits of using a well-modeled virtual platform of a simple system-on-chip (SoC) design.
The article will discuss how to effectively use interface and abstraction techniques, modeling tools, debugging techniques, and profiling to characterize and validate architectures and embedded software.
To read the full article, click here
Related Semiconductor IP
- AXI to UCIe FDI Interface IP
- 45SPCLO UCIe-Class 1-32Gbps Low Power Receiver IP (NRZ)
- 45SPCLO UCIe-Class 1-32Gbps Low Power Transmitter IP (NRZ)
- Peripheral Sensor Interface (PSI5) Host Controller
- Link Acceleration Unit
Related Articles
- Leveraging virtual hardware platforms for embedded software validation
- Dealing with automotive software complexity with virtual prototyping - Part 3: Embedded software testing
- Processor-In-Loop Simulation: Embedded Software Verification & Validation In Model Based Development
- Fast virtual platforms open up multicore software development
Latest Articles
- CHIA: An open-source framework for principled, agentic AI-driven hardware/software co-design research
- Croc: Training the Next Generation Chip Designers on Domain-Specific End-to-End Open Source Silicon
- Design and Development of a Neuromorphic Silicon Suite: PVT Sensing, Stochastic LIF Inference, On-Chip STDP Learning, and Crossbar Programming
- LLM4RTL: Tool-Assisted LLM for RTL Generation
- Towards Delta Aware Training: Efficient DNN Weight Storage for Resource-Constrained FPGAs