The Ideal Solution for AI Applications - Speedcore eFPGA
By Achronix Semiconductor Corporation
Introduction and Background
Artificial intelligence (AI) is reshaping the way the world works, opening up countless opportunities in commercial and industrial systems. Applications span diverse markets such as autonomous driving, medical diagnostics, home appliances, industrial automation, adaptive websites and financial analytics. Even the communications infrastructure linking these systems together is moving towards automated self-repair and optimization. These new architectures will perform functions such as load balancing and allocating resources such as wireless channels and network ports based on predictions learned from experience.
These applications demand high performance and, in many cases, low latency to respond successfully to realtime changes in conditions and demands. They also require power consumption to be as low as possible, rendering unusable, solutions that underpin machine-learning in cloud servers where power and cooling are plentiful. A further requirement is for these embedded systems to be always on and ready to respond even in the absence of a network connection to the cloud. This combination of factors calls for a change in the way that hardware is designed.
Related Semiconductor IP
- eFPGA IP — Flexible Reconfigurable Logic Acceleration Core
- Radiation-Hardened eFPGA
- eFPGA Hard IP Generator
- eFPGA Soft IP
- eFPGA on GlobalFoundries GF12LPP
Related Articles
- The Quest for Reliable AI Accelerators: Cross-Layer Evaluation and Design Optimization
- PCIe 5.0: The universal high-speed interconnect for High Bandwidth and Low Latency Applications Design Challenges & Solutions
- Verification and Validation (V&V)-in-the-Loop for RISC-V Design: The Holistic Vision of BZL
- A Reconfigurable Multiplier Architecture for Error-Resilient Applications in RISC-V Core
Latest Articles
- Terracotta: Enabling the Adoption of New DRAM Techniques via a Flexible DRAM Interface and Memory Controller
- A Framework for Accelerating Transformer Inference on RISC-V for Edge AI
- An Interleaved Parallel Dependent Quantization Hardware Architecture for H.266/VVC
- A Formal Security Analysis of CAN XL
- A Secure dToF LiDAR SoC with Dual-Domain Fingerprinting and Event-Driven AFE Circuit Achieving Sensor-Level Attack Resilience