Vendor: LeWiz Communications, Inc. Category: eFPGA

Radiation Hardened eFPGA

Self-correcting & Highly Reliable

Overview

FPGAs and embedded FPGAs (eFPGA) are expected to be omnipresent in electronic designs – even more pervasive than it is today in both Earth and space applications. Its programmability, built-in processor, peripheral functions and more advanced tools make it easier to use and design. With the availability of eFPGA, a variety of custom programmable solutions can be offered. This is ideal for systems requiring application-specific hardware acceleration or AI algorithms. In applications, where radiation hardened (RH) is required, customized rad-hard capabilities can be developed to support high radiation requirements where commercial FPGA devices may not be available.

At LeWiz, we specialize in Rad-Hard chip development, even for sub-22nm silicon where Rad-Hard by manufacturing is not an option. We’ve developed RH IP cores and circuit design techniques beyond the well known tri-modular redundancy (TMR) method to provide RH protections for memories, combinational/sequential logic, and mixed signal or high-speed analog circuits. These are offered with our RH eFPGA technologies to meet or exceed requirements for RH sensors, data acquisition, avionics, and networking systems. Our solutions detect and correct errors making them fault tolerant and operating even if they encounter errors. We prevent radiation damage to devices, enable them to withstand >300Krads TID, mitigate single event effect, and quickly recover from erroneous conditions at multiple orders of magnitude better than other solutions available in the market.

LeWiz RH eFPGA core offers high I/O counts, scalable number of LUTs (configurable based on eFPGA tile(s)), protected on-chip RAM, DSP acceleration, DFT scan, global clock distribution, high speed I/Os, and others. The radiation-hardened capabilities include configuration memory and configuration controllers. These programmable products use well-known tools such as industry standard Synplify™ and eFPGA fast compilers. This combination offers efficient synthesis and are scalable for large designs. For FPGA programming, multiple options are offered including non-volatile memory, SD card, and high-speed standard busses.

Key features

  • Complete RH protection including configuration memory and controller 
  • Single Bit Error Detection and Correction 
  • Double Bit Error Detection 
  • Fast error recovery 
  • Multiple user SRAM banks 
  • Multiple high-speed transceiver banks 
  • 12.5 Gbps per lane – supports 10 Gbps Ethernet communication 
  • ECC on-chip memory 
  • High number of Input/Output per block (in the hundreds range) 
  • Scalable number of Look-Up Tables (LUTs) 
  • Scalable number of DSP acceleration 
  • Option for logic only or logic/memory + DSP – compatible footprint 
  • Efficient mapping + routing 
  • Built-in clock drivers for low-latency clock distribution 
  • DFT scan 
  • RH flip-flops + logic cell arrays 
  • ASIC ready process 
  • CRC protected for configuration bitstream 

Block Diagram

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Benefits

  • Self-correcting & Highly Reliable 
  • RH eFPGA technology 
  • Scalable LUT array 
  • Protected array and RAM 
  • Multi-configuration methods 

Specifications

Identity

Part Number
RHeFPGA
Vendor
LeWiz Communications, Inc.
Type
Silicon IP

Files

Product Sheet Download

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Provider

Learn more about eFPGA IP core

Simple Mode, Advanced Mode: A Clear Path to Closing Timing Around eFPGA

Most conversations about eFPGA and timing stop at reassurance: the fabric is hardened, the timing is characterized, trust the .lib file. That’s true, but it skips the question ASIC architects actually need answered when they sit down to close STA: how does the handoff work, and who owns which part of it? That’s the piece worth walking through.

The Practical Guide to eFPGA Integration

Embedded FPGA technology is increasingly recognized as a strategic enabler for adaptive ASIC and SoC architectures. Yet many engineering teams still hesitate when evaluating eFPGA integration. Why?

eFPGA: The ASIC Power-Up, Not an Off-the-Shelf Substitute

In semiconductor design, there is a persistent misconception that adding an embedded FPGA (eFPGA) to an SoC is simply a way to “shrink” a standalone FPGA onto your die. If you view eFPGA merely as a substitute for a Commercial Off-The-Shelf (COTS) FPGA, you’re overlooking its broader architectural and lifecycle advantages.

Tapeout Predictability with Hardened eFPGA IP Blocks

For architects, adding flexibility via embedded FPGA (eFPGA) is a natural solution for post-silicon requirements, allowing for evolving standards and late-breaking feature additions. However, a critical question remains: Does adding programmable logic help your schedule, or does it introduce a new layer of uncertainty and risk? The answer lies in the delivery format. While soft IP offers configuration flexibility, hardened eFPGA IP blocks are the secret weapon for teams prioritizing tapeout predictability.

Accreditation Without Compromise: Making eFPGA Assurable for Decades

For embedded FPGA (eFPGA) to succeed in defense, we must change the narrative. It cannot be treated as a hobbyist FPGA dropped into an SoC. It must be treated as an assured ASIC IP block governed by disciplined processes, verifiable artifacts, and increasingly by open-source toolchains that guarantee long-term independence.

Frequently asked questions about eFPGA IP cores

What is Radiation Hardened eFPGA?

Radiation Hardened eFPGA is a eFPGA IP core from LeWiz Communications, Inc. listed on Semi IP Hub.

How should engineers evaluate this eFPGA?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this eFPGA IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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