Protecting multicore designs without compromising performance
Steve Singer, INSIDE Secure
embedded.com (April 26, 2014)
Networking silicon design teams face huge leaps in demand for faster security protocol throughput, a demand driven by increasing data transfer speeds, as well as market forces (increasing attacks from hackers and malware) and technology trends. To meet the throughput demands, designers are turning to SoCs with multiple processor cores as well as multiple dedicated blocks of intelligent packet processing engines, all working in parallel to deliver throughputs of 40+ Gbps.
Cisco estimates that IP traffic is expanding at a compound annual growth rate (CAGR) of 25 percent - a doubling every three years. In parallel with the continual bandwidth expansion is the swelling of security threats to data-in-transit. Threats include address spoofing, passive monitoring (or ‘eavesdropping’), data integrity attacks, and sophisticated man-in-the middle attacks. These threats are driving the industry to encrypt an ever-increasing percentage of communications using security protocols such as MACsec, IPsec and SSL/TLS.
Adding to the pressure from various market forces are technology trends that put increasing demands on the packet processing. Virtual private network (VPN) communications must be protected by encryption with a security protocol. And the increasing use of mobile offload to WiFi is also driving a rise in encrypted packet traffic.
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