A scalable, cost-effective phase change RAM technology
S. Lee, H. Park et al., Hynix Semiconductor Inc.
5/21/2012 3:28 PM EDT
Abstract
We successfully developed highly scalable and cost-effective PCRAM technology based on 0.007 µm2 (4F2, 84-nm pitch) sized novel cell scheme. The chip size and density are 33.207-mm2 and 1 Gb. The device functionality and reliability were clearly demonstrated through fully integrated chip, which showed a promising feasibility for productive NVM applications.
Introduction
So far, PCRAM (phase change RAM) research has been focused on mobile application such as NOR and/or LPDDR2 NVM [1-3]. PCRAM can also merge the attractive points of NAND and DRAM in one chip, which makes a prospective potential for the new application concept like storage-class memory (SCM) to reduce the performance gap between DRAM and SSD. Furthermore, PCRAM can be alternatively compatible for working memory and storage type application. Therefore, it can be started in the middle point of system architecture which moves to memory-like and/or storage-like. In recent, industry is also considering feasibility for various new applications. However, PCRAM production cost is still questionable. In this paper, we report a technological platform and attractive breakthrough which should be significantly addressed to implement cost-competitive and highly scalable PCRAM.
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