MEMS -> Defects present hurdle to volume production
Defects present hurdle to volume production
By EE Times
July 12, 2001 (7:18 p.m. EST)
URL: http://www.eetimes.com/story/OEG20010712S0077
MEMS devices are built with semiconductor equipment. But their failure mechanisms and reliability concerns are completely different from those of ICs. One major concern with MEMs is stiction, or the propensity of two silicon surfaces to stick to each other if they touch. Another is packaging, one of the most difficult and expensive matters to address. Because optical MEMS devices contain exposed moving parts contaminants can make them stop functioning. For this reason, MEMS wafers must be singulated using specialized techniques. There are only a handful of companies that have successfully dealt with these concerns and are supplying reliable commercial MEMS devices. With optical MEMS, the high-volume manufacturing needed to detect PPM-level defects and problems in a new manufacturing process does not exist today. Since quality and reliability of optical components are important to the telecom industry, selecting an experienced MEMS supplier is mission critical and great care should be taken to check on suppliers' manufacturing track records. -Scott Blackstone, optical MEMS product line director at Micromachined Products Division for Analog Devices Inc. (Wilmington, Mass.)
Related Semiconductor IP
- Zigbee Transceiver PHY
- Data Flow Architecture IP
- AMBA SPI Controller MRAM Controller
- Ethernet MAC
- Protocol Bridges
Related Articles
- Structured ASICs take FPGA prototypes into volume production
- MEMS market to grow 75-87% over five-year period, says report
- MEMS -> MEMS switch uses magnetic actuation
- MEMS -> Optical, structural roles shared on die
Latest Articles
- A Low-Latency ASIC Architecture for Real-Time Line Segment Detection
- BitFair: A 12nm Bit-Serial CNN Accelerator with Learnable Early Termination and Adaptive Bit Ordering for Ultra-Low-Power XR Vision
- A Flexible Sparsity-Aware FPGA Accelerator with Column-Wise Compression for Efficient CNN Inference
- Reducing Instruction-Fetch Energy in RISC-V for Embedded AI Processing via Dynamic and Static Loop Caching
- SPARC: Automated Root-Cause Analysis of Pre-Silicon Power Side-Channel Leakage in the Processor Design Flow