FPGAs offer cost-effective, flexible solutions for remote radio heads
Sumit Shah, Xilinx
EETimes (4/18/2013 2:01 PM EDT)
The explosion of smartphone and tablets is putting exponential strain on wireless networks. Whereas smartphones took about eight years to reach a 10 percent market adoption point, usage jumped to 40 percent in less than three years following the introduction of the iPhone in 2007, according to MIT’s quarterly Technology Review. That rapid growth continues. This user demand has pushed network operators and the OEMs supplying their equipment to cover a broad spectrum of wireless technologies - including GSM, CDMA2000, TD-SCDMA, UMTS and LTE – all while boosting capacity by using new frequencies, higher bandwidth and greater numbers of cell sites to meet the increasing demands.
Competitive pressures and rapid demand are forcing a need to get new products into market at ever faster rates. The newest generation of field programmable gate arrays (FPGAs) – manufactured at the proven 28nm process technology node – offer tighter integration, a reduced BOM costs and increased operational efficiency. By using off-the-shelf intellectual property (IP) and Xilinx 7 series FPGAs and Zynq-7000 All Programmable SoC devices, OEMs can meet shifting market demands while avoiding the huge upfront investment of $20 million or more required to spin a new, fixed architecture device. These FPGA and SoC devices are tightly integrated to deliver more system functions with a focus on programmability, the highest bandwidth and parallel processing available to leverage programmable logic, fewer components, lower power consumption and accelerated design productivity.
To read the full article, click here
Related Semiconductor IP
- Xilinx Virtual Cable
- 25 Gb/s AES-ECB 128/192/256 Crypto Cores
- Xilinx HMC Controller
- Xilinx MicroBlaze Trace Core (XMTC)
- Xilinx Ultra Scale Plus SATA HOST IP
Related Articles
- Designing remote radio heads (RRHs) on high-performance FPGAs
- High-Performance DSPs -> Software-defined radio infrastructure taps DSP
- Embedded Systems: Programmable Logic -> Common gateway networks enable remote programs
- Embedded Systems: Programmable Logic -> FPGAs don remote reprogram habits
Latest Articles
- A Low-Latency ASIC Architecture for Real-Time Line Segment Detection
- BitFair: A 12nm Bit-Serial CNN Accelerator with Learnable Early Termination and Adaptive Bit Ordering for Ultra-Low-Power XR Vision
- A Flexible Sparsity-Aware FPGA Accelerator with Column-Wise Compression for Efficient CNN Inference
- Reducing Instruction-Fetch Energy in RISC-V for Embedded AI Processing via Dynamic and Static Loop Caching
- SPARC: Automated Root-Cause Analysis of Pre-Silicon Power Side-Channel Leakage in the Processor Design Flow