eFPGA LUTs Will Outship FPGA LUTs Later This Decade
By Geoff Tate, CEO of Flex Logix
EETimes (February 28, 2022)
FPGAs have become a strategic technology. It used to be a “poor man’s ASIC” and provided a customized IC for lower-volume applications. While it is still used this way in many systems, it has also become strategically important to two very big, high-growth applications:
- Cloud data centers: networking, storage and security
- Communications systems: base stations and 5G, etc.
In fact, FPGAs are so strategic for the data center that it caused Intel to buy Altera and more recently AMD to buy Xilinx. This is because processor workloads in many cases are shifting to FPGAs.
Data centers use FPGAs in volume to provide the parallel programmability a processor cannot achieve (one customer calls it “programmability at the speed of hardware”). These FPGAs are paired with dedicated function ICs such as NICs (network interface chips) and network switch chips. Each data center has different workloads and needs so a standard product for all doesn’t work, and each data center has the volumes and capital to optimize for their needs.
Communications systems have long used FPGAs to handle hundreds of national frequency bands and protocols. Now with 5G, FPGAs are used to manage the complexity and evolving standards such as O-RAN.
While FPGA programmability is very valuable as described above, the power and size of FPGAs is another story. As a result, today data center and communication companies want to integrate their FPGAs into SoCs to reduce size and power.
To read the full article, click here
Related Semiconductor IP
- eFPGA IP — Flexible Reconfigurable Logic Acceleration Core
- Radiation-Hardened eFPGA
- eFPGA Hard IP Generator
- eFPGA Soft IP
- eFPGA on GlobalFoundries GF12LPP
Related Articles
- The end of the smartphone era: What will be the technology battlegrounds of the next decade?
- An 800 Mpixels/s, ~260 LUTs Implementation of the QOI Lossless Image Compression Algorithm and its Improvement through Hilbert Scanning
- What This Year May Well Bring for the eFPGA
- LUTstructions: Self-loading FPGA-based Reconfigurable Instructions
Latest Articles
- Automated Pre-Silicon Verification of High-Speed DDR5 and LPDDR5/6 Memory Controllers: Closed-Loop Timing, Mode Register, and PHY Synchronization in UVM
- U-Sonic: An Open-Source 8-Channel Ultrasound Transmit IP in a 130 nm RISC-V SoC
- S-ALSA: Co-Design of Adiabatic Logic-based Sensing and Balanced Bit-Cells for Secure and Energy-Efficient MRAM
- MEGATRON: a 28nm Analog PCM CiM/Digital System-on-Chip for Edge GenAI at 57.5 TOPS/W and 1.52 Mparam/mm²
- Peregrino: A Full-Hardware Accelerator for the Complete Falcon Post-Quantum Digital Signature Scheme on Resource-Constrained Edge Devices