What you need to know about automated testing and simulation
By Kim Pries from Stoneridge Electronics and Jon Quigley from Volvo 3P
Embedded.com Apr 14, 2009 (12:39 PM)
Wedding simulation with automated testing allows test organizations to achieve benefits such as increases in testing speed (through-put), increases in test coverage for both hardware and software, and the ability to test before hardware becomes available. In this article, we will describe each type of approach in turn and then how they can work together synergistically.
Simulation generally refers to a model of a process or function; for example, we can simulate the general behavior of a manufacturing process, a motor vehicle, or any other object for which we have knowledge about inputs, outputs, and behavior.
Both simulation and testing have specific goals. For simulation, we want to facilitate requirements generation, uncover unknown design interactions and details, and reduce development cost by having fewer actual parts.
Much of this activity facilitates testing in quantifying the requirements, making testing more productive (Figure 1, below). For testing, we want to achieve defect containment, reduced product warranty cost, and some level of statistical indication of design readiness.
Figure 1 Simulation Uses
Embedded.com Apr 14, 2009 (12:39 PM)
Wedding simulation with automated testing allows test organizations to achieve benefits such as increases in testing speed (through-put), increases in test coverage for both hardware and software, and the ability to test before hardware becomes available. In this article, we will describe each type of approach in turn and then how they can work together synergistically.
Simulation generally refers to a model of a process or function; for example, we can simulate the general behavior of a manufacturing process, a motor vehicle, or any other object for which we have knowledge about inputs, outputs, and behavior.
Both simulation and testing have specific goals. For simulation, we want to facilitate requirements generation, uncover unknown design interactions and details, and reduce development cost by having fewer actual parts.
Much of this activity facilitates testing in quantifying the requirements, making testing more productive (Figure 1, below). For testing, we want to achieve defect containment, reduced product warranty cost, and some level of statistical indication of design readiness.
Figure 1 Simulation Uses
To read the full article, click here
Related Semiconductor IP
- AXI to UCIe FDI Interface IP
- 45SPCLO UCIe-Class 1-32Gbps Low Power Receiver IP (NRZ)
- 45SPCLO UCIe-Class 1-32Gbps Low Power Transmitter IP (NRZ)
- Peripheral Sensor Interface (PSI5) Host Controller
- Link Acceleration Unit
Related Articles
- SoC Test and Verification -> Testing mixed-signal Bluetooth designs
- Opto-electronics -> Passive filters upgrade jitter testing
- RF Simulation Improves 802.11a System Performance
- IC Physical Design: Portable Layout and Simulation Technigues for ADSL Analog Devices
Latest Articles
- CHIA: An open-source framework for principled, agentic AI-driven hardware/software co-design research
- Croc: Training the Next Generation Chip Designers on Domain-Specific End-to-End Open Source Silicon
- Design and Development of a Neuromorphic Silicon Suite: PVT Sensing, Stochastic LIF Inference, On-Chip STDP Learning, and Crossbar Programming
- LLM4RTL: Tool-Assisted LLM for RTL Generation
- Towards Delta Aware Training: Efficient DNN Weight Storage for Resource-Constrained FPGAs