A short primer on instruction set architecture
by Imen Baili , Menta
EDN (April 13, 2021)
In computer science, an instruction set architecture (ISA) is an abstract model of a computer. It’s also referred to as architecture or computer architecture. Moreover, a central processing unit (CPU), a venue of realization of an ISA, is called an implementation. An ISA specifies the behavior of machine code running on implementations of that ISA in a fashion that does not depend on the microarchitecture providing binary compatibility between implementations.
An ISA can be extended by adding instructions or other capabilities or adding support for larger addresses and data values. An implementation of the extended ISA will still be able to execute machine code for versions of the ISA without those extensions. Machine code using those extensions will only run on the implementations that support those extensions.
To read the full article, click here
Related Semiconductor IP
- eFPGA IP — Flexible Reconfigurable Logic Acceleration Core
- Radiation-Hardened eFPGA
- eFPGA Hard IP Generator
- eFPGA Soft IP
- eFPGA on GlobalFoundries GF12LPP
Related Articles
- IC design: A short primer on the formal methods-based verification
- SoCs: Supporting Socketization -> Ready, set, reuse: A socketization primer
- Development and use of an Instruction Set Simulator of 68000-compatible processor core
- Dynamic instruction set load-in method for Java SoC
Latest Articles
- SEAM-V: A Hybrid-Decoupled RISC-V Vector Processor with Backend-Visible EP Context for Sustained Vector Throughput
- New Number Formats for FFT IP Cores in Optical OFDM Transceivers
- Reducing Power Consumption of Embedded Dynamic Memories with ECCs
- NIFA: Nonlinear IMC enhanced FPGA for efficient ML inference
- A 32-channel event-based bio-signal analog front-end with adaptive delta and pulse frequency encoding